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SI4734-C40-GM

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42
Si4734/35-C40
16 Rev. 1.0
Table 12. Reference Clock and Crystal Characteristics
(V
DD
= 2.7 to 5.5 V, V
IO
= 1.85 to 3.6 V, T
A
= –20 to 85 °C)
Parameter Symbol Test Condition Min Typ Max Unit
Reference Clock
RCLK Supported Frequencies
1
31.130 32.768 40,000 kHz
RCLK Frequency Tolerance
2
–100 — 100 ppm
REFCLK_PRESCALE 1 — 4095
REFCLK 31.130 32.768 34.406 kHz
Crystal Oscillator
Crystal Oscillator Frequency — 32.768 — kHz
Crystal Frequency Tolerance
2
–100 — 100 ppm
Board Capacitance — — 3.5 pF
Notes:
1. The Si4734/35 divides the RCLK input by REFCLK_PRESCALE to obtain REFCLK. There are some RCLK
frequencies between 31.130 kHz and 40 MHz that are not supported. For more details, see Table 6 of “AN332: Si47xx
Programming Guide”.
2. A frequency tolerance of ±50 ppm is required for FM seek/tune using 50 kHz channel spacing and AM seek/tune in SW
frequencies.
Si4734/35-C40
Rev. 1.0 17
2. Typical Application Schematic (QFN)
Notes:
1. Place C1 close to V
DD
pin.
2. All grounds connect directly to GND plane on PCB.
3. Pins 1 and 20 are no connects, leave floating.
4. To ensure proper operation and receiver performance, follow the guidelines in “AN383: Si47xx Antenna, Schematic,
Layout, and Design Guidelines.” Silicon Laboratories will evaluate schematics and layouts for qualified customers.
5. Pin 2 connects to the FM antenna interface, and pin 4 connects to the AM antenna interface.
6. Place Si4734/35 as close as possible to antenna and keep the FMI and AMI traces as short as possible.
20
19
18
17
16
U1
Si4734/35-GM
NC
FMI
RFGND
AMI
RST
DOUT
LOUT
ROUT
GND
VDD
NC
GPO1
GPO2
GPO3
DFS
SEN
SCLK
SDIO
RCLK
VIO
SEN
SCLK
SDIO
1
2
3
4
5
15
14
13
12
11
6
7
8
9
10
RST
RCLK
C1
VBATTERY
2.7 to 5.5 V
VIO
1.85 to 3.6 V
FMI
C2 C3
X1
RCLK
GPO3
Optional: for crystal oscillator option
C5
L1
L2
LOUT
ROUT
GPO1
GPO2/INT
DCLK
DFS
DOUT
Optional: Digital Audio Output
R1
R2
R3
C4
Si4734/35-C40
18 Rev. 1.0
3. Typical Application Schematic (SSOP)
Notes:
1. Place C1 close to V
DD
and DBYP pins.
2. All grounds connect directly to GND plane on PCB.
3. Pins 6 and 7 are no connects, leave floating.
4. Pins 10 and 11 are unused. Tie these pins to GND.
5. To ensure proper operation and receiver performance, follow the guidelines in “AN383: Si47xx Antenna, Schematic,
Layout, and Design Guidelines.” Silicon Laboratories will evaluate schematics and layouts for qualified customers.
6. Pin 8 connects to the FM antenna interface, and pin 12 connects to the AM antenna interface.
7. Place Si4734/35 as close as possible to antenna and keep the FMI and AMI traces as short as possible.
1
2
3
4
5
6
7
8
9
10
11
12
DOUT
C2 C3
X1
RCLK
GPIO3
Optional: for crystal oscillator option
DFS
24
23
22
21
20
19
18
17
16
15
14
13
R1
R2
R3
GPO3/DCLK
Optional: Digital Audio Output
GPO2/INT
GPO1
NC
NC
FMI
C5
L1
NC
NC
RST
SEN
SCLK
SDIO
1.85 to 3.6 V
2.0 to 5.5 V
DBYP
RCLK
ROUT
LOUT
GND
RFGND
VDD
VIO
AMI
C1
L2
C4
C4
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42

SI4734-C40-GM

Mfr. #:
Buy SI4734-C40-GM
Manufacturer:
Silicon Labs
Description:
RF Receiver Si4734 rev C Broadcast AM/FM/SW/LW Radio Receiver 3x3x0.55 20-pin QFN, lead free
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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