Si4734/35-C40
Rev. 1.0 37
Table 17. PCB Land Pattern Dimensions
Symbol Millimeters Symbol Millimeters
Min Max Min Max
D 2.71 REF GE 2.10
D2 1.60 1.80 W 0.34
e 0.50 BSC X 0.28
E 2.71 REF Y 0.61 REF
E2 1.60 1.80 ZE 3.31
f 2.53 BSC ZD 3.31
GD 2.10
Notes: General
1.
All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification.
3. This Land Pattern Design is based on IPC-SM-782 guidelines.
4. All dimensions shown are at Maximum Material Condition (MMC). Least Material
Condition (LMC) is calculated based on a Fabrication Allowance of 0.05 mm.
Notes: Solder Mask Design
1. All metal pads are to be non-solder mask defined (NSMD). Clearance between the
solder mask and the metal pad is to be 60 µm minimum, all the way around the pad.
Notes: Stencil Design
1.
A stainless steel, laser-cut, and electro-polished stencil with trapezoidal walls should
be used to assure good solder paste release.
2. The stencil thickness should be 0.125 mm (5 mils).
3. The ratio of stencil aperture to land pad size should be 1:1 for the perimeter pads.
4. A 1.45 x 1.45 mm square aperture should be used for the center pad. This provides
approximately 70% solder paste coverage on the pad, which is optimum to assure
correct component stand-off.
Notes: Card Assembly
1.
A No-Clean, Type-3 solder paste is recommended.
2. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification
for Small Body Components.
Si4734/35-C40
38 Rev. 1.0
13. Package Outline: Si4734/35 SSOP
Figure 16 illustrates the package details for the Si4734/35. Table 18 lists the values for the dimensions shown in
the illustration.
Figure 16. 24-Pin SSOP
Table 18. Package Dimensions
Dimension Min Nom Max
A—1.75
A1 0.10 0.25
b0.200.30
c0.100.25
D 8.65 BSC
E 6.00 BSC
E1 3.90 BSC
e 0.635 BSC
L0.401.27
L2 0.25 BSC
θ
aaa 0.20
bbb 0.18
ccc 0.10
ddd 0.10
Notes:
1.
All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to the JEDEC Solid State Outline MO-137, Variation AE.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification
for Small Body Components.
Si4734/35-C40
Rev. 1.0 39
14. PCB Land Pattern: Si4734/35 SSOP
Figure 17 illustrates the PCB land pattern details for the Si4734/35-C40-GU SSOP. Table 19 lists the values for the
dimensions shown in the illustration.
Figure 17. PCB Land Pattern
Table 19. PCB Land Pattern Dimensions
Dimension Min Max
C5.205.40
E 0.65 BSC
X1 0.35 0.45
Y1 1.55 1.75
General:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This land pattern design is based on the IPC-7351 guidelines.
Solder Mask Design:
3. All metal pads are to be non-solder mask defined (NSMD). Clearance between the
solder mask and the metal pad is to be 60 µm minimum, all the way around the pad.
Stencil Design:
4. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should
be used to assure good solder paste release.
5. The stencil thickness should be 0.125 mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
Card Assembly:
7.
A No-Clean, Type-3 solder paste is recommended.
8. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification
for Small Body Components.

SI4734-C40-GM

Mfr. #:
Manufacturer:
Silicon Labs
Description:
RF Receiver Si4734 rev C Broadcast AM/FM/SW/LW Radio Receiver 3x3x0.55 20-pin QFN, lead free
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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