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IDT5T9821NLI

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36
13
INDUSTRIAL TEMPERATURE RANGE
IDT5T9821
EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR
LVEPECL
(1)
Symbol Parameter Test Conditions Min. Typ.
(2)
Max Unit
Input Characteristics
IIH Input HIGH Current VDD = 2.7V VI = VDDQN/GND — — ±5 µA
IIL Input LOW Current VDD = 2.7V VI = GND/VDDQN ——±5
VIK Clamp Diode Voltage VDD = 2.3V, IIN = -18mA — - 0.7 - 1.2 V
VIN DC Input Voltage - 0.3 — 3.6 V
VCM DC Common Mode Input Voltage
(3,5)
915 1082 1248 mV
VREF Single-Ended Reference Voltage
(4,5)
— 1082 — mV
VIH DC Input HIGH 1275 — 1620 mV
V
IL DC Input LOW 555 — 875 mV
NOTES:
1. See RECOMMENDED OPERATING RANGE table.
2. Typical values are at VDD = 2.5V, +25°C ambient.
3. VCM specifies the maximum allowable range of (VTR + VCP) /2. Differential mode only.
4. For single-ended operation while in differential mode, REF[1:0]/VREF[1:0] is tied to the DC voltage VREF[1:0].
5. The reference clock input is capable of HSTL, eHSTL, LVEPECL, 1.8V or 2.5V LVTTL operation independent of the device output. (See Input/Output Selection table.)
DIFFERENTIAL INPUT AC TEST CONDITIONS FOR LVEPECL
Symbol Parameter Value Units
VDIF Input Signal Swing
(1)
732 mV
VX Differential Input Signal Crossing Point
(2)
1082 mV
VTHI Input Timing Measurement Reference Level
(3)
Crossing Point V
t
R, tF Input Signal Edge Rate
(4)
1 V/ns
NOTES:
1. The 732mV peak-to-peak input pulse level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the VDIF (AC)
specification under actual use conditions.
2. A 1082mV crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the VX specification
under actual use conditions.
3. In all cases, input waveform timing is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 1V/ns or greater is to be maintained in the 20% to 80% range of the input waveform.
14
INDUSTRIAL TEMPERATURE RANGE
IDT5T9821
EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER
NOTES:
1. See RECOMMENDED OPERATING RANGE table.
2. For 2.5V LVTTL single-ended operation, Bits 35/34, 33/32, 31/30 = 0/1 or 1/0, and REF[1:0]/VREF[1:0] is left floating. If Bits 47 - 36 = 0, FB/VREF2 should be left floating.
3. VDIF specifies the minimum input differential voltage (VTR - VCP) required for switching where VTR is the "true" input level and VCP is the "complement" input level. Differential mode
only. The DC differential voltage must be maintained to guarantee retaining the existing HIGH or LOW input. The AC differential voltage must be achieved to guarantee switching
to a new state.
4. VCM specifies the maximum allowable range of (VTR + VCP) /2. Differential mode only.
5. For single-ended operation, in differential mode, REF[1:0]/VREF[1:0] is tied to the DC voltage VREF[1:0].
6. Voltage required to maintain a logic HIGH, single-ended operation in differential mode.
7. Voltage required to maintain a logic LOW, single-ended operation in differential mode.
8. Typical values are at VDD = 2.5V, VDDQN = VDD, +25°C ambient.
9. The reference clock input is capable of HSTL, eHSTL, LVEPECL, 1.8V or 2.5V LVTTL operation independent of the device output. (See Input/Output Selection table.)
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR 2.5V
LVTTL
(1)
Symbol Parameter Test Conditions Min. Typ.
(8)
Max Unit
Input Characteristics
IIH Input HIGH Current VDD = 2.7V VI = VDDQN/GND — — ±5 µA
IIL Input LOW Current VDD = 2.7V VI = GND/VDDQN ——±5
VIK Clamp Diode Voltage VDD = 2.3V, IIN = -18mA — - 0.7 - 1.2 V
V
IN DC Input Voltage - 0.3 +3.6 V
Single-Ended Inputs
(2)
VIH DC Input HIGH 1.7 — V
V
IL DC Input LOW — 0.7 V
Differential Inputs
VDIF DC Differential Voltage
(3,9)
0.2 — V
VCM DC Common Mode Input Voltage
(4,9)
1150 1250 1350 mV
VIH DC Input HIGH
(5,6,9)
VREF + 100 — mV
VIL DC Input LOW
(5,7,9)
—VREF - 100 mV
V
REF Single-Ended Reference Voltage
(5,9)
— 1250 — mV
Output Characteristics
VOH Output HIGH Voltage IOH = -12mA VDDQN - 0.4 — V
IOH = -100µAVDDQN - 0.1 — V
VOL Output LOW Voltage IOL = 12mA — 0.4 V
I
OL = 100µA — 0.1 V
15
INDUSTRIAL TEMPERATURE RANGE
IDT5T9821
EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER
SINGLE-ENDED INPUT AC TEST CONDITIONS FOR 2.5V LVTTL
Symbol Parameter Value Units
VIH Input HIGH Voltage VDD V
VIL Input LOW Voltage 0V
VTHI Input Timing Measurement Reference Level
(1)
VDD/2 V
tR, tF Input Signal Edge Rate
(2)
2 V/ns
NOTES:
1. A nominal 1.25V timing measurement reference level is specified to allow constant, repeatable results in an automatic test equipment (ATE) environment.
2. The input signal edge rate of 2V/ns or greater is to be maintained in the 10% to 90% range of the input waveform.
DIFFERENTIAL INPUT AC TEST CONDITIONS FOR 2.5V LVTTL
Symbol Parameter Value Units
VDIF Input Signal Swing
(1)
VDD V
VX Differential Input Signal Crossing Point
(2)
VDD/2 V
VTHI Input Timing Measurement Reference Level
(3)
Crossing Point V
tR, tF Input Signal Edge Rate
(4)
2.5 V/ns
NOTES:
1. A nominal 2.5V peak-to-peak input pulse level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the VDIF
(AC) specification under actual use conditions.
2. A nominal 1.25V crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the VX specification
under actual use conditions.
3. In all cases, input waveform timing is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 2.5V/ns or greater is to be maintained in the 20% to 80% range of the input waveform.
NOTES:
1. These power consumption characteristics are for all the valid input interfaces and cover the worst case input and output interface combinations.
2. The termination resistors are excluded from these measurements.
3. If the differential input interface is used, the true input is held LOW and the complementary input is held HIGH.
4. Bit 60 = 1.
5. All outputs are at the same interface level.
POWER SUPPLY CHARACTERISTICS FOR 2.5V LVTTL OUTPUTS
(1)
Symbol Parameter Test Conditions
(2)
Typ. Max Unit
I
DDQ Quiescent VDD Power Supply Current
(3)
VDDQN = Max., REF = LOW, PD = HIGH, nSOE = LOW, 112 150 mA
PLL_EN = HIGH, Outputs enabled, All outputs unloaded
I
DDQQ Quiescent VDDQN Power Supply Current
(3)
VDDQN = Max., REF = LOW, PD = HIGH, nSOE = LOW, 15 75 µA
PLL_EN = HIGH, Outputs enabled, All outputs unloaded
IDDPD Power Down Current VDD = Max., PD = LOW, nSOE = LOW, PLL_EN = HIGH 0.3 3 mA
I
DDD Dynamic VDD Power Supply VDD = Max., VDDQN = Max., CL = 0pF 21 30 µA/MHz
Current per Output
I
DDDQ Dynamic VDDQN Power Supply VDD = Max., VDDQN = Max., CL = 0pF 33 40 µA/MHz
Current per Output
I
TOT Total Power VDD Supply Current
(4,5)
VDDQN = 2.5V., FVCO = 100MHz, CL = 15pF 280 400 mA
VDDQN = 2.5V., FVCO = 250MHz, CL = 15pF 320 450
I
TOTQ Total Power VDDQN Supply Current
(4,5)
VDDQN = 2.5V., FVCO = 100MHz, CL = 15pF 210 320 mA
V
DDQN = 2.5V., FVCO = 250MHz, CL = 15pF 345 530
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36

IDT5T9821NLI

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IC CLK DRIVER ZD PLL 68-VFQFPN
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