22
INDUSTRIAL TEMPERATURE RANGE
IDT5T9821
EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER
Duty-Cycle Jitter
nQ, QFB
nQ, QFB
tW(MIN)
tW(MAX)
tJIT(DUTY) = tW(MAX) - tW(MIN)
JITTER AND OFFSET TIMING WAVEFORMS
nQ, QFB
tcycle n tcycle n + 1
nQ, QFB
tjit(cc) tcycle n tcycle n+1
=
Cycle-to-Cycle jitter
Static Phase Offset
FB
REF[1:0]
t(Ø)n
REF[1:0]
FB
t(Ø)n + 1
t(Ø)
=
N
n = N
1
t(Ø)n
(N is a large number of samples)
NOTE:
1. Diagram for Bit 58 = 1 and HSTL / eHSTL input and output.
23
INDUSTRIAL TEMPERATURE RANGE
IDT5T9821
EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER
Period jitter
tjit(per)
=
tcycle n
1
f
o
nQ, QFB
nQ, QFB
tcycle n
1
f
o
nQ, QFB
nQ, QFB
1
f
o
tjit(hper)
=
thalf period n
1
2*f
o
thalf period n
thalf period n+1
nQ, Q
FB
nQ, QFB
nQ, QFB
nQ, QFB
Half-Period jitter
NOTE:
1. 1/fo = average period.
NOTE:
1. 1/fo = average period.
24
INDUSTRIAL TEMPERATURE RANGE
IDT5T9821
EEPROM PROGRAMMABLE 2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER
TEST CIRCUITS AND CONDITIONS
Test Circuit for Differential Input
(1)
VDD
VDDQN
D.U.T.
REF[1:0]
REF[1:0]
Pulse
Generator
3 inch, ~50
Transmission Line
3 inch, ~50
Transmission Line
VIN
VIN
VDDI
R1
R2
VDDI
R1
R2
DIFFERENTIAL INPUT TEST CONDITIONS
Symbol VDD = 2.5V ± 0.2V Unit
R1 100
R2 100
VDDI VCM*2 V
HSTL: Crossing of REF
[1:0] and REF[1:0]
eHSTL: Crossing of REF[1:0] and REF[1:0]
VTHI LVEPECL: Crossing of REF[1:0] and REF[1:0] V
1.8V LVTTL: V
DDI/2
2.5V LVTTL: V
DD/2
NOTE:
1. This input configuration is used for all input interfaces. For single-ended testing,
the REF[1:0] must be left floating. For testing single-ended in differential input
mode, the VIN should be floating.

IDT5T9821NLI

Mfr. #:
Manufacturer:
Description:
IC CLK DRIVER ZD PLL 68-VFQFPN
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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