LTC4066/LTC4066-1
19
4066fc
APPLICATIONS INFORMATION
Consider, for example, a USB charge condition where
R
CLPROG
= 2k, R
PROG
= 100k and C
TIMER
= 0.1μF. This
corresponds to a three hour charge cycle. However, if the
HPWR input is set to a logic low, then the input current
limit will be reduced from 500mA to 100mA. With no ad-
ditional system load, this means the charge current will
be reduced to 100mA. Therefore, the termination timer
will automatically slow down by a factor of fi ve until the
charger reaches constant voltage mode (i.e., V
BAT
= 4.2V,
4.1V for LTC4066-1) or HPWR is returned to a logic high.
The charge cycle is automatically lengthened to account for
the reduced charge current. The exact time of the charge
cycle will depend on how long the charger remains in
constant current mode and/or how long the HPWR pin
remains a logic low.
Once a time-out occurs and the voltage on the battery is
greater than the recharge threshold, the charge current
stops, and the CHRG output assumes a high impedance
state if it has not already done so.
Connecting the TIMER pin to ground disables the battery
charger.
CHRG Status Output Pin
When the charge cycle starts, the CHRG pin is pulled
to ground by an internal N-channel MOSFET capable of
driving an LED. When the charge current drops below a
programmable threshold while in constant-voltage mode,
the pin assumes a high impedance state (but charge current
continues to fl ow until the charge time elapses). If this
state is not reached before the end of the programmable
charge time, the pin will assume a high impedance state
when a time-out occurs.
The current level at which the CHRG pin changes state is
programmed by the I
STAT
pin. As described in Monitoring
Charge Current and Gas Gauge, the I
STAT
pin sources a
current proportional to the BAT pin current. The LTC4066/
LTC4066-1 monitor the voltage on the I
STAT
pin and turns
off the CHRG N-channel pull-down when V
ISTAT
drops
below 100mV while in constant-voltage mode. The CHRG
current detection threshold can be calculated by the fol-
lowing equation:
I
V
R
V
R
DETECT
ISTAT ISTAT
==
01
1000
100.
•
For example, to program the CHRG pin to change state at
a battery charge current of 100mA, choose:
R
V
mA
k
ISTAT
==
100
100
1
Note: The end-of-charge (EOC) comparator that moni-
tors the I
STAT
pin voltage for 100mV latches its decision.
Therefore, the fi rst time V
ISTAT
drops below 100mV (i.e.,
I
BAT
drops below 100V/R
ISTAT
) while in constant voltage
mode will toggle CHRG to a high impedance state. If, for
some reason, the charge current rises back above the
threshold, the CHRG pin will not resume the strong pull-
down state. The EOC latch can be reset by toggling the
SHDN pin or toggling the input power to the part. The EOC
latch will also be reset if the BAT pin voltage falls below
the recharge threshold.
