ZL38001 Data Sheet
22
Zarlink Semiconductor Inc.
Once the program has been loaded, to begin execution from RAM, bootload mode must be disabled (BOOT bit,
C
2
=0) and execution from RAM enabled (RAM_ROMb bit, C
3
=1) by setting the appropriate bits in the BRC register.
During the bootload process, however, ROM program execution (RAM_ROMb bit, C
3
=0) should be selected. See
Table 6 for the effect of the BRC register settings on Microport accesses and on program execution.
Following program loading and enabling of execution from RAM, it is recommended that users set the software
reset bit in the Main Control (MC) register, to ensure that the device updates the default register values to those of
the new program in RAM. Note: it is important to use a software reset rather than a hardware (RESET
=0) reset, as
the latter will return the device to its default settings (which includes execution from program ROM instead of RAM.)
To verify which code revision is currently running, users can access the Firmware Revision Code (FRC) register
(see Register Summary). This register reflects the identity code (revision number) of the last program to run register
initialization (which follows a software or hardware reset.)
Figure 8 - Serial Microport Timing for Intel Mode 0
R/W
A
0
A
1
A
2
A
3
A
4
A
5
X
COMMAND/ADDRESS DATA INPUT/OUTPUT
DATA 1
SCLK
CS
a
b
c
d
e
a
b
c
d
e
This delay is due to internal processor timing and is equal to Tsch time. The delay is transparent to ZL38001.
The ZL38001:
outputs transmit data on the falling edge of SCLK
The falling edge of CS
indicates that a COMMAND/ADDRESS byte will be transmitted from the microprocessor. The subsequent
byte is always data followed by CS
returning high.
A new COMMAND/ADDRESS byte may be loaded only by CS cycling high then low again.
The COMMAND/ADDRESS byte contains: 1 bit - Read/Write
6 bits - Addressing Data
1 bit - Unused
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
latches receive data on the rising edge of SCLK
ZL38001 Data Sheet
23
Zarlink Semiconductor Inc.
Figure 9 - Serial Microport Timing for Motorola Mode 00 or National Microwire
XA
0
A
1
A
2
A
3
A
4
A
5
R/W
COMMAND/ADDRESS DATA INPUT
DATA 2
Receive
DATA 1
Transmit
SCLK
CS
a
b
c
d
e
a
c
d
e
This delay is due to internal processor timing and is equal to Tsch time. The delay is transparent to ZL38001.
The falling edge of CS
indicates that a COMMAND/ADDRESS byte will be transmitted from the microprocessor. The subsequent
byte is always data followed by CS
returning high.
A new COMMAND/ADDRESS byte may be loaded only by CS
cycling high then low again.
The COMMAND/ADDRESS byte contains: 1 bit - Read/Write
6 bits - Addressing Data
1 bit - Unused
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
High Impedance
DATA OUTPUT
b
The ZL38001:
outputs transmit data on the falling edge of SCLK
latches receive data on the rising edge of SCLK
ZL38001 Data Sheet
24
Zarlink Semiconductor Inc.
* Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.
Typical figures are at 25
C and are for design aid only: not guaranteed and not subject to production testing.
*DC Electrical Characteristics are over recommended temperature and supply voltage.
Absolute Maximum Ratings*
Parameter Symbol Min. Max. Units
1 Supply Voltage V
DD
-V
SS
-0.5 5.0 V
2 Input Voltage V
i
V
SS
-0.3 5.5 V
3 Output Voltage Swing V
o
V
SS
-0.3 5.5 V
4 Continuous Current on any digital pin I
i/o
20 mA
5 Storage Temperature T
ST
-65 150 C
6 Package Power Dissipation P
D
90 (typ) mW
Recommended Operating Conditions
- Voltages are with respect to ground (V
SS
) unless otherwise stated.
Characteristics Sym. Min. Typ. Max. Units Test Conditions
1 Supply Voltage V
DD
2.7 3.3 3.6 V
2 Input High Voltage 1.4 V
DD
V
3 Input Low Voltage V
SS
0.4 V
4 Operating Temperature T
A
-40 +85 C
Echo Return Limits
Characteristics Min. Typ. Max. Units Test Conditions
1 Acoustic Echo Return 0 dB Measured from Rout -> Sin
2 Line Echo Return 0 dB Measured from Sout -> Rin
DC Electrical Characteristics*
- Voltages are with respect to ground (V
SS
) unless otherwise stated.
Characteristics Sym. Min. Typ.
Max. Units Conditions/Notes
1
Standby Supply Current: I
CC
370A RESET = 0
Operating Supply Current: I
DD
20 mA RESET = 1, clocks active
2 Input HIGH voltage V
IH
0.7V
DD
V
3 Input LOW voltage V
IL
0.3V
DD
V
4 Input leakage current I
IH
/I
IL
0.1 10 AV
IN
=V
SS
to V
DD
5 High level output voltage V
OH
0.8V
DD
VI
OH
=2.5 mA
6 Low level output voltage V
OL
0.4V
DD
VI
OL
=5.0 mA
7 High impedance leakage I
OZ
110AV
IN
=V
SS
to V
DD
8 Output capacitance C
o
10 pF
9 Input capacitance C
i
8pF

ZL38001DGF1

Mfr. #:
Manufacturer:
Microchip / Microsemi
Description:
Communication ICs - Various Pb Free ACOUSTIC ECHO CANC.+LOW ERL COMP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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