VERSACLOCK
®
PROGRAMMABLE CLOCK GENERATOR 10 JANUARY 25, 2017
5P35021 DATASHEET
Digital Spread Spectrum
Fout
Fvco
N
*2
Fss
Fpfd
period
*2
period
SSamoutN
step
*
Down spread or Spread off
N = Fvco/Fpfd
Center Spread
N = Nssoff + N*SSamount/2
N: include integer and fraction
Fvco: vco’s frequency
Fpfd: PLL’s pfd frequency
Fss: spread modulation rate
SSamout: spread percentage
The black line is for the down spread,N will decrease to make the center frequency is lower than spread off.
The blue line is for the center spread, there is a offset put on divider ratio to make the center frequency keep same as spread off.
example: 0.5% down spread @ 32KHz modulation rate
JANUARY 25, 2017 11 VERSACLOCK
®
PROGRAMMABLE CLOCK GENERATOR
5P35021 DATASHEET
VBAT
The 5P35021 supports Low Power operation 32.768kHz RTC clock with only coin cell battery supply. The coin cell battery power
capacitance is usually 170mAhr or higher, with less than 2µA* low-power DCO operation mode will support application up to few
years clock source for date/time keeping circuit (RTC).
When there is main power exist like VDD33 and VDDA, the 5P35021 will switch DCO power source to main power to save battery
power. VBAT should be powered earlier or at same time with other VDD power up.
VBAT Switching Threshold
ORT–VCO Over-shoot Reduction Technology
The 5P35021 supports innovate the VCO over-shoot reduction technology (ORT) to prevent an output clock frequency spike
when the device is changing frequency on the fly or doing DFC (Dynamic Frequency Control) function. The VCO frequency
changes are under control instead of free-run to targeted frequency.
PLL Features and Descriptions
VDD33
VBAT
Switch to VBAT
(VDD33 falling down to 2.3V)
Switch to VDD33
(VDD33 raise up to 2.5V )
VDD33 VBAT DCO power source
>2.5V
--
VDD33
<2.3V
--
VBAT
*VBAT needs to be 3.0V~3.3V
Output divider 1 table
Output Divider bits<1:0> OO O1 1O 11
OO 1248
O1 4 8 16 32
1O 5 10 20 40
11 6 12 24 48
Output 2,4,5 divider table
Output Divider bits<1:0> OO O1 1O 11
OO 1245
O1 3 6 12 15
1O 5 10 20 25
11 10 20 40 50
Output 3 divider table
Output Divider bits<1:0> OO O1 1O 11
OO 1248
O1 3 6 12 24
1O 5 10 20 40
11 10 20 40 80
Output Divider bits<3:2>
Output Divider bits<3:2>
Output Divider bits<3:2>
VERSACLOCK
®
PROGRAMMABLE CLOCK GENERATOR 12 JANUARY 25, 2017
5P35021 DATASHEET
Output Clock Test Conditions
2 inches
2pF
33 ohm
LVCMOS
LVCMOS output test conditions
5 inches
2pF
2pF
33 ohm
33 ohm
LPHCSL
LPHCSL output test conditions

5P35021-000NDGI

Mfr. #:
Manufacturer:
IDT
Description:
Clock Generators & Support Products VersaClock 3S 5P25021 Prog. Clock
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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