VERSACLOCK
®
PROGRAMMABLE CLOCK GENERATOR 4 JANUARY 25, 2017
5P35021 DATASHEET
Pin Descriptions
JANUARY 25, 2017 5 VERSACLOCK
®
PROGRAMMABLE CLOCK GENERATOR
5P35021 DATASHEET
Device Feature and Function
DFC–Dynamic Frequency Control
OTP program (Only) setup 4 different feedback fractional divider (4 VCO frequencies) that apply to PLL2
ORT (over shoot reduction) function will be applied automatically during the VCO frequency change
Smooth frequency incremental or decremental from current VCO to targeted VCO base on DFC hardware pins selection
DFC Block Diagram
DFC Function Priority Table
DFC Function Programming
Register B63b3:2 select DFC00~DFC11 configuration
Byte16~19 are the register for PLL2 VCO setting, base on B63b3:2 configuration selection, the data write to B16~19 will be
store in selected configuration OTP memory
Refer to DFC function priority table, select proper control pin(s) to activate DFC function
Note the DFC function can also be controlled by I2C access
PLL2
Mdivider
Ndivider
Ndivider
Ndivider
Ndivider
Selector
00
01
10
11
DFC1:0
OTP/I2C
OUTDIV
DFC_EN
bit(W32[4])
OE1_fun_sel
(W30[6:5])
*OE3_fun_sel
(W30[3:2])
SCL_DFC1 DFC[1:0] Notes
0xxx0DFC disable
1 11 (DFC) 00~10 (DFC) x [0,OE1]
One pin DFC -
OE1
1 11 (DFC) 11 (DFC) x [OE3,OE1]
Two pin DFC -
OE3,OE1
1 00~10 11 x Not permit Not supported
1 00~10 00~10 0
[SCL_DFC1,
SDA_DFC0]
I2C pin as DFC
control pins mode
1 00~10 00~10 1 W30[1:0]
I2C control DFC
mode
* 5P35021 has only OE1 pin for DFC function hardware pin selection. For OE1/OE3 two pins DFC control, use 5P35023
QFN24 package device.
VERSACLOCK
®
PROGRAMMABLE CLOCK GENERATOR 6 JANUARY 25, 2017
5P35021 DATASHEET
PPS–Proactive Power Saving Function
PPS Proactive Power Saving is an IDT patented unique design for the clock generator that proactively detects end device power
down state and then switches output clocks between the normal operation clock frequency and the low power mode 32KHz clock
that only consume <2uA current. The system could save power when the device goes into power down or sleep mode. The PPS
function diagram is shown below.
PPS Function Block Diagram
PPS Assertion/Deassertion Timing Chart
PPS Function Programming
Refer to OE_pin_fucntion_table to have proper PPS function selected for OE pin(s), please note that register default is set to
Output enable (OE)
Have proper setup to Byte 30 and 32 for OE1~OE3 function selection, for PPS function, select 10 to control register bits
I2C
&
Logic
Xtal
Oscillator
PLL
PPS
Control
Logic
Low
Power
DCO
Logic
Power
Down
Control
Xtal
Oscillator
Xin
Xout
Mhz
/KHz
Switching
PPS assertion
PPS deassertion
1st cycle
2nd cycle
3rd cycle
1st cycle
2nd cycle
32K clocks
32K clocksMHz clock
MHz clock

5P35021-000NDGI

Mfr. #:
Manufacturer:
IDT
Description:
Clock Generators & Support Products VersaClock 3S 5P25021 Prog. Clock
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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