JANUARY 25, 2017 15 VERSACLOCK
®
PROGRAMMABLE CLOCK GENERATOR
5P35021 DATASHEET
DC Electrical Characteristics
Symbol Parameter Test Conditions Min Typ Max Unit
Iddcore Core Supply Current
VDD=VDDSE=VDD33=3.3V, Xtal=25Mhz, PLL2/3 OFF,
No Output - PLLs disabled
5mA
Idd_PLL1
3
PLL1 Supply Current
VDD=VDDSE=VDD33=3.3V, Xtal=25Mhz, PLL2/3 OFF,
No Output - PLL1= 600MHz
13 mA
VDD=VDDSE=VDD33=2.5V, Xtal=25Mhz, PLL2/3 OFF,
No Output - PLL1= 600MHz
13 mA
Idd_PLL2
3
PLL2 Supply Current
VDD=VDDSE=VDD33=3.3V, Xtal=25Mhz, PLL1/3 OFF,
No Output - PLL2=1GHz
11 mA
VDD=VDDSE=VDD33=2.5V, Xtal=25Mhz, PLL1/3 OFF,
No Output - PLL2=1GHz
11 mA
Idd_PLL3
3
PLL3 Supply Current
VDD=VDDSE=VDD33=3.3V, Xtal=25Mhz, PLL1/2 OFF,
No Output - PLL3=480
4mA
LVPECL, 500 MHz, 3.3V VDDDIFF (DIFF1,2) 39 mA
LVPECL, 156.25 MHz, 2.5V VDDDIFF (DIFF1,2) 33 mA
LVDS, 500 MHz, 3.3V VDDDIFF (DIFF1,2) 13 mA
LVDS, 250 MHz, 2.5V VDDDIFF (DIFF1,2) 8 mA
LPHCSL, 125MHz, 3.3V VDDDIFF, 2 pF load (DIFF1,2) 7 mA
LPHCSL, 100 MHz, 2.5V VDDDIFF, 2 pF load
8mA
LVCMOS, 8 MHz, 3.3V, VDDSE
1,2
(SE1)
1mA
LVCMOS, 8 MHz, 2.5V, VDDSE
1,2
(SE1)
1mA
LVCMOS, 8 MHz, 1.8V, VDDSE
1,2
(SE1)
1mA
LVCMOS, 160 MHz, 3.3V VDDSEx1 (SE1) 9.5 mA
LVCMOS, 160 MHz, 2.5V VDDSEx1,2 (SE1) 5.0 mA
LVCMOS, 160 MHz, 1.8V VDDSEx1,2 (SE1) 6.0 mA
Iddpd Power Down Current
PD asserted with VDDA, VDD33 and VDDSE ON, I2C
Programming, 32K running
3.5 mA
Iddsuspend -
VDD33
Iddsuspend-VBAT
Only VBAT=3.3V and VDDSEn is powered
1.1 µA
Iddsuspend -
SEn 3.3V
Iddsuspend - VDDSEn 3.3V
Only VBAT=3.3V and VDDSEn is powered with 3.3V
3.4 µA
Iddsuspend -
SEn 2.5V
Iddsuspend - VDDSEn 2.5V
Only VBAT =3.3Vand VDDSEn is powered with 2.5V
2.5 µA
Iddsuspend -
SEn 1.8V
Iddsuspend - VDDSEn 1.8V
Only VBAT=3.3V and VDDSEn is powered with 1.8V
1.8 µA
1. Single CMOS driver active.
2. SE1~3 current measured with 2 inches transmission line and 2 pF load, DIFF clock current measured with 5 inches transmission line with 2 pF loads.
3. Iddcore = IddA+ IddD, no loads.
Iddox Output Buffer Supply Current