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LPC2458FET180,551

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P72P73-P75P76-P78P79-P81
LPC2458 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 4.1 — 15 October 2013 10 of 81
NXP Semiconductors
LPC2458
Single-chip 16-bit/32-bit micro
P0[17]/CTS1/
MISO0/MISO
J12
[1]
I/O P0[17] — General purpose digital input/output pin.
I CTS1 — Clear to Send input for UART1.
I/O MISO0 — Master In Slave Out for SSP0.
I/O MISO — Master In Slave Out for SPI.
P0[18]/DCD1/
MOSI0/MOSI
J13
[1]
I/O P0[18] — General purpose digital input/output pin.
I DCD1 — Data Carrier Detect input for UART1.
I/O MOSI0 — Master Out Slave In for SSP0.
I/O MOSI — Master Out Slave In for SPI.
P0[19]/DSR1/
MCICLK/SDA1
J10
[1]
I/O P0[19] — General purpose digital input/output pin.
I DSR1 — Data Set Ready input for UART1.
O MCICLK — Clock output line for SD/MMC interface.
I/O SDA1 — I
2
C1 data input/output (this is not an open-drain pin).
P0[20]/DTR1/
MCICMD/SCL1
K14
[1]
I/O P0[20] — General purpose digital input/output pin.
O DTR1 — Data Terminal Ready output for UART1.
I/O MCICMD — Command line for SD/MMC interface.
I/O SCL1 — I
2
C1 clock input/output (this is not an open-drain pin).
P0[21]/RI1/
MCIPWR/RD1
K11
[1]
I/O P0[21] — General purpose digital input/output pin.
I RI1 — Ring Indicator input for UART1.
O MCIPWR — Power Supply Enable for external SD/MMC power supply.
I RD1 — CAN1 receiver input.
P0[22]/RTS1/
MCIDAT0/TD1
L14
[1]
I/O P0[22] — General purpose digital input/output pin.
O RTS1 — Request to Send output for UART1.
I/O MCIDAT0 — Data line 0 for SD/MMC interface.
O TD1 — CAN1 transmitter output.
P0[23]/AD0[0]/
I2SRX_CLK/
CAP3[0]
F5
[2]
I/O P0[23] — General purpose digital input/output pin.
I AD0[0] — A/D converter 0, input 0.
I/O I2SRX_CLK — Receive Clock. It is driven by the master and received by the
slave. Corresponds to the signal SCK in the I
2
S-bus specification.
I CAP3[0] — Capture input for Timer 3, channel 0.
P0[24]/AD0[1]/
I2SRX_WS/
CAP3[1]
E1
[2]
I/O P0[24] — General purpose digital input/output pin.
I AD0[1] — A/D converter 0, input 1.
I/O I2SRX_WS — Receive Word Select. It is driven by the master and received by
the slave. Corresponds to the signal WS in the I
2
S-bus specification.
I CAP3[1] — Capture input for Timer 3, channel 1.
P0[25]/AD0[2]/
I2SRX_SDA/
TXD3
E4
[2]
I/O P0[25] — General purpose digital input/output pin.
I AD0[2] — A/D converter 0, input 2.
I/O I2SRX_SDA — Receive data. It is driven by the transmitter and read by the
receiver. Corresponds to the signal SD in the I
2
S-bus specification.
O TXD3 — Transmitter output for UART3.
Table 4. Pin description
…continued
Symbol Ball Type Description
LPC2458 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 4.1 — 15 October 2013 11 of 81
NXP Semiconductors
LPC2458
Single-chip 16-bit/32-bit micro
P0[26]/AD0[3]/
AOUT/RXD3
D1
[2][3]
I/O P0[26] — General purpose digital input/output pin.
I AD0[3] — A/D converter 0, input 3.
O AOUT — D/A converter output.
I RXD3 — Receiver input for UART3.
P0[27]/SDA0 L3
[4]
I/O P0[27] — General purpose digital input/output pin. Output is open-drain.
I/O SDA0 — I
2
C0 data input/output. Open-drain output (for I
2
C-bus compliance).
P0[28]/SCL0 M1
[4]
I/O P0[28] — General purpose digital input/output pin. Output is open-drain.
I/O SCL0 — I
2
C0 clock input/output. Open-drain output (for I
2
C-bus compliance).
P0[29]/USB_D+1 K5
[5]
I/O P0[29] — General purpose digital input/output pin.
I/O USB_D+1 — USB port 1 bidirectional D+ line.
P0[30]/USB_D1N4
[5]
I/O P0[30] — General purpose digital input/output pin.
I/O USB_D1 — USB port 1 bidirectional D line.
P0[31]/USB_D+2 N1
[5]
I/O P0[31] — General purpose digital input/output pin.
I/O USB_D+2 — USB port 2 bidirectional D+ line.
P1[0] to P1[31] I/O Port 1: Port 1 is a 32 bit I/O port with individual direction controls for each bit. The
operation of port 1 pins depends upon the pin function selected via the Pin
Connect block.
P1[0]/
ENET_TXD0
B5
[1]
I/O P1[0] — General purpose digital input/output pin.
O ENET_TXD0 — Ethernet transmit data 0 (RMII/MII interface).
P1[1]/
ENET_TXD1
A5
[1]
I/O P1[1] — General purpose digital input/output pin.
O ENET_TXD1 — Ethernet transmit data 1 (RMII/MII interface).
P1[2]/
ENET_TXD2/
MCICLK/
PWM0[1]
B7
[1]
I/O P1[2] — General purpose digital input/output pin.
O ENET_TXD2 — Ethernet transmit data 2 (MII interface).
O MCICLK — Clock output line for SD/MMC interface.
O PWM0[1] — Pulse Width Modulator 0, output 1.
P1[3]/
ENET_TXD3/
MCICMD/
PWM0[2]
A9
[1]
I/O P1[3] — General purpose digital input/output pin.
O ENET_TXD3 — Ethernet transmit data 3 (MII interface).
I/O MCICMD — Command line for SD/MMC interface.
O PWM0[2] — Pulse Width Modulator 0, output 2.
P1[4]/
ENET_TX_EN
C6
[1]
I/O P1[4] — General purpose digital input/output pin.
O ENET_TX_EN — Ethernet transmit data enable (RMII/MII interface).
P1[5]/
ENET_TX_ER/
MCIPWR/
PWM0[3]
B13
[1]
I/O P1[5] — General purpose digital input/output pin.
O ENET_TX_ER — Ethernet Transmit Error (MII interface).
O MCIPWR — Power Supply Enable for external SD/MMC power supply.
O PWM0[3] — Pulse Width Modulator 0, output 3.
P1[6]/
ENET_TX_CLK/
MCIDAT0/
PWM0[4]
B10
[1]
I/O P1[6] — General purpose digital input/output pin.
I ENET_TX_CLK — Ethernet Transmit Clock (MII interface).
I/O MCIDAT0 — Data line 0 for SD/MMC interface.
O PWM0[4] — Pulse Width Modulator 0, output 4.
Table 4. Pin description
…continued
Symbol Ball Type Description
LPC2458 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 4.1 — 15 October 2013 12 of 81
NXP Semiconductors
LPC2458
Single-chip 16-bit/32-bit micro
P1[7]/
ENET_COL/
MCIDAT1/
PWM0[5]
C13
[1]
I/O P1[7] — General purpose digital input/output pin.
I ENET_COL — Ethernet Collision detect (MII interface).
I/O MCIDAT1 — Data line 1 for SD/MMC interface.
O PWM0[5] — Pulse Width Modulator 0, output 5.
P1[8]/
ENET_CRS_DV/
ENET_CRS
B6
[1]
I/O P1[8] — General purpose digital input/output pin.
I ENET_CRS_DV/ENET_CRS — Ethernet Carrier Sense/Data Valid (RMII
interface)/ Ethernet Carrier Sense (MII interface).
P1[9]/
ENET_RXD0
D7
[1]
I/O P1[9] — General purpose digital input/output pin.
I ENET_RXD0 — Ethernet receive data 0 (RMII/MII interface).
P1[10]/
ENET_RXD1
A7
[1]
I/O P1[10] — General purpose digital input/output pin.
I ENET_RXD1 — Ethernet receive data 1 (RMII/MII interface).
P1[11]/
ENET_RXD2/
MCIDAT2/
PWM0[6]
A12
[1]
I/O P1[11] — General purpose digital input/output pin.
I ENET_RXD2 — Ethernet Receive Data 2 (MII interface).
I/O MCIDAT2 — Data line 2 for SD/MMC interface.
O PWM0[6] — Pulse Width Modulator 0, output 6.
P1[12]/
ENET_RXD3/
MCIDAT3/
PCAP0[0]
A14
[1]
I/O P1[12] — General purpose digital input/output pin.
I ENET_RXD3 — Ethernet Receive Data (MII interface).
I/O MCIDAT3 — Data line 3 for SD/MMC interface.
I PCAP0[0] — Capture input for PWM0, channel 0.
P1[13]/
ENET_RX_DV
D14
[1]
I/O P1[13] — General purpose digital input/output pin.
I ENET_RX_DV — Ethernet Receive Data Valid (MII interface).
P1[14]/
ENET_RX_ER
D8
[1]
I/O P1[14] — General purpose digital input/output pin.
I ENET_RX_ER — Ethernet receive error (RMII/MII interface).
P1[15]/
ENET_REF_CLK/
ENET_RX_CLK
A8
[1]
I/O P1[15] — General purpose digital input/output pin.
I ENET_REF_CLK/ENET_RX_CLK — Ethernet Reference Clock (RMII interface)/
Ethernet Receive Clock (MII interface).
P1[16]/
ENET_MDC
B8
[1]
I/O P1[16] — General purpose digital input/output pin.
O ENET_MDC — Ethernet MIIM clock.
P1[17]/
ENET_MDIO
C9
[1]
I/O P1[17] — General purpose digital input/output pin.
I/O ENET_MDIO — Ethernet MI data input and output.
P1[18]/
USB_UP_LED1/
PWM1[1]/
CAP1[0]
L5
[1]
I/O P1[18] — General purpose digital input/output pin.
O USB_UP_LED1 — USB port 1 GoodLink LED indicator. It is LOW when device is
configured (non-control endpoints enabled), or when host is enabled and has
detected a device on the bus. It is HIGH when the device is not configured, or
when host is enabled and has not detected a device on the bus, or during global
suspend. It transitions between LOW and HIGH (flashes) when host is enabled
and detects activity on the bus.
O PWM1[1] — Pulse Width Modulator 1, channel 1 output.
I CAP1[0] — Capture input for Timer 1, channel 0.
P1[19]/
USB_TX_E1
/
USB_PPWR1
/
CAP1[1]
P5
[1]
I/O P1[19] — General purpose digital input/output pin.
O USB_TX_E1
— Transmit Enable signal for USB port 1 (OTG transceiver).
O USB_PPWR1
— Port Power enable signal for USB port 1.
I CAP1[1] — Capture input for Timer 1, channel 1.
Table 4. Pin description …continued
Symbol Ball Type Description
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P72P73-P75P76-P78P79-P81

LPC2458FET180,551

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Buy LPC2458FET180,551
Manufacturer:
NXP Semiconductors
Description:
ARM Microcontrollers - MCU ARM7 512KF/USBH/ENET
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