40-Channel, 14-Bit,
Serial Input, Voltage Output DAC
AD5371
Rev. B
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FEATURES
40-channel DAC in 80-lead LQFP and 100-ball CSP_BGA
Guaranteed monotonic to 14 bits
Maximum output voltage span of 4 × V
REF
(20 V)
Nominal output voltage span of −4 V to +8 V
Multiple, independent output voltage spans available
System calibration function allowing user-programmable
offset and gain
Channel grouping and addressing features
Thermal shutdown function
DSP/microcontroller-compatible serial interface
SPI/LVDS serial interface
2.5 V to 5.5 V digital interface
Digital reset (
RESET
)
Clear function to user-defined SIGGNDx
Simultaneous update of DAC outputs
APPLICATIONS
Level setting in automatic test equipment (ATE)
Variable optical attenuators (VOA)
Optical switches
Industrial control systems
Instrumentation
FUNCTIONAL BLOCK DIAGRAM
14
AD5371
VREF0
SIGGND0
VREF2
SIGGND4SIGGND3SIGGND2
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT16
TO
VOUT39
LDAC
DV
CC
V
DD
V
SS AGND DGND
X1A
REGISTER
X1B
REGISTER
C REGISTER
M REGISTER
BUFFER
GROUP 0
SPI/LVDS
SYNC
SCLK
SYNC
SDI
SDI
SCLK
SDO
BUSY
RESET
CLR
STATE
MACHINE
OUTPUT BUFFER
AND
POWER-DOWN
CONTROL
OUTPUT BUFFER
AND
POWER-DOWN
CONTROL
DAC 7
OFFSET
DAC 0
DAC 0
BUFFER
OFS0
REGISTER
14
1414
14
14
14
14
14
14
14
14
8 8
14
DAC 0
REGISTER
14
DAC 7
REGISTER
MUX 2
MUX 1MUX 1MUX 1MUX 1
TO
MUX2
A/B SELECT
REGISTER
CONTROL
REGISTER
X1A
REGISTER
X1B
REGISTER
C REGISTER
M REGISTER
14
14
14
14
X2A
REGISTER
X2B
REGISTER
14
14
14
14
14
MUX 2
VREF1
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
X1A
REGISTER
X1B
REGISTER
C REGISTER
M REGISTER
BUFFER
GROUP 1
OUTPUT BUFFER
AND
POWER-DOWN
CONTROL
OUTPUT BUFFER
AND
POWER-DOWN
CONTROL
DAC 7
OFFSET
DAC 1
DAC 0
BUFFER
OFS1
REGISTER
14
1414
14
14
14
14
14
14
14
14
8 8
DAC 0
REGISTER
14
DAC 7
REGISTER
MUX 2
TO
MUX2
A/B SELECT
REGISTER
X1A
REGISTER
X1B
REGISTER
C REGISTER
M REGISTER
14
14
14
14
14
14
14
14
MUX 2
VREF2 SUPPLIES
GROUP 2 TO GROUP 4
SIGGND1
GROUP 2 TO GROUP 4
ARE SAME AS GROUP 1
X2A
REGISTER
X2B
REGISTER
14
X2A
REGISTER
X2B
REGISTER
14
X2A
REGISTER
X2B
REGISTER
14
SERIAL
INTERFACE
05814-001
Figure 1.
AD5371* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
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EVALUATION KITS
AD5371 Evaluation Board
DOCUMENTATION
Application Notes
AN-1036: Clear to Any Voltage Using the AD5370
Data Sheet
AD5371: 40-Channel, 14-Bit, Serial Input, Voltage Output
DAC Data Sheet
Product Highlight
Extending the
dense
DAC™ Multichannel D/As
SOFTWARE AND SYSTEMS REQUIREMENTS
AD5360 IIO Multi-Channel DAC Linux Driver
AD5370/AD5371/AD5372/AD5373 Evaluation Software
REFERENCE MATERIALS
Product Selection Guide
AD536x, AD537x Family Product Selection Guide
Solutions Bulletins & Brochures
Digital to Analog Converters ICs Solutions Bulletin
DESIGN RESOURCES
AD5371 Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
DISCUSSIONS
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SAMPLE AND BUY
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TECHNICAL SUPPORT
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number.
DOCUMENT FEEDBACK
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AD5371
Rev. B | Page 2 of 28
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
General Description......................................................................... 3
Specifications..................................................................................... 4
Performance Specifications......................................................... 4
AC Characteristics........................................................................ 5
Timing Characteristics ................................................................ 6
Absolute Maximum Ratings............................................................ 9
ESD Caution.................................................................................. 9
Pin Configurations and Function Descriptions ......................... 10
Typical Performance Characteristics ........................................... 13
Terminology .................................................................................... 15
Theory of Operation ...................................................................... 16
DAC Architecture....................................................................... 16
Channel Groups.......................................................................... 16
A/B Registers and Gain/Offset Adjustment............................ 17
Load DAC.................................................................................... 17
Offset DACs ................................................................................17
Output Amplifier........................................................................ 18
Transfer Function.......................................................................18
Reference Selection .................................................................... 18
Calibration................................................................................... 19
Additional Calibration............................................................... 19
Reset Function............................................................................ 20
Clear Function............................................................................ 20
BUSY
and
LDAC
Functions...................................................... 20
Power-Down Mode.................................................................... 20
Thermal Shutdown Function ................................................... 20
Toggle Mode................................................................................ 21
Serial Interface ................................................................................ 22
SPI Interface................................................................................ 22
LVDS Interface............................................................................ 22
SPI Write Mode .......................................................................... 22
SPI Readback Mode ................................................................... 23
LVDS Operation......................................................................... 23
Register Update Rates................................................................ 23
Channel Addressing and Special Modes................................. 23
Special Function Mode.............................................................. 25
Applications Information.............................................................. 27
Power Supply Decoupling......................................................... 27
Power Supply Sequencing ......................................................... 27
Interfacing Examples ................................................................. 27
Outline Dimensions....................................................................... 28
Ordering Guide .......................................................................... 28
REVISION HISTORY
3/08—Rev. A to Rev. B
Added Table 1.................................................................................... 3
Changes to Timing Characteristics Section.................................. 6
Changes to Absolute Maximum Ratings Section......................... 9
Changes to Table 7.......................................................................... 11
Changes to Figure 16, Figure 18, and Figure 19 ......................... 14
Changes to A/B Registers and Gain/Offset Adjustment
Section and Load DAC Section .................................................... 17
Changes to Transfer Function Section......................................... 18
Changes to Calibration Section .................................................... 19
Changes to Reset Function Section and Clear Function
Section.............................................................................................. 20
Changes to Table 9.......................................................................... 20
Changes to Register Update Rates Section.................................. 23
11/07—Rev. 0 to Rev. A
Reformatted Specifications Table 1.................................................3
Reformatted Specifications Table 2.................................................6
Change to A/B Registers and Gain/Offset
Adjustment Section........................................................................ 19
Change to SPI Write Mode Section.............................................. 24
Changes to Ordering Guide.......................................................... 31
8/07—Revision 0: Initial Version

AD5371BBCZ-REEL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC 40-CH 14-bit Serial bipolar IC
Lifecycle:
New from this manufacturer.
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