AD5371
Rev. B | Page 24 of 28
Table 15 shows which groups and which channels are addressed for every combination of Address Bit A5 to Address Bit A0.
Table 15. Group and Channel Addressing
Address Bit A5 to Address Bit A3
Address Bit A2
to Address Bit A0
000 001 010 011 100 101 110 111
000
All groups,
all channels
Group 0,
Channel 0
Group 1,
Channel 0
Group 2,
Channel 0
Group 3,
Channel 0
Group 4,
Channel 0
Group 0,
Group 1,
Group 2,
Group 3,
Group 4;
Channel 0
Group 1,
Group 2,
Group 3,
Group 4;
Channel 0
000
Group 0,
all channels
Group 0,
Channel 1
Group 1,
Channel 1
Group 2,
Channel 1
Group 3,
Channel 1
Group 4,
Channel 1
Group 0,
Group 1,
Group 2,
Group 3,
Group 4;
Channel 1
Group 1,
Group 2,
Group 3,
Group 4;
Channel 1
010
Group 1,
all channels
Group 0,
Channel 2
Group 1,
Channel 2
Group 2,
Channel 2
Group 3,
Channel 2
Group 4,
Channel 2
Group 0,
Group 1,
Group 2,
Group 3,
Group 4;
Channel 2
Group 1,
Group 2,
Group 3,
Group 4;
Channel 2
011
Group 2,
all channels
Group 0,
Channel 3
Group 1,
Channel 3
Group 2,
Channel 3
Group 3,
Channel 3
Group 4,
Channel 3
Group 0,
Group 1,
Group 2,
Group 3,
Group 4;
Channel 3
Group 1,
Group 2,
Group 3,
Group 4;
Channel 3
100
Group 3,
all channels
Group 0,
Channel 4
Group 1,
Channel 4
Group 2,
Channel 4
Group 3,
Channel 4
Group 4,
Channel 4
Group 0,
Group 1,
Group 2,
Group 3,
Group 4;
Channel 4
Group 1,
Group 2,
Group 3,
Group 4;
Channel 4
101
Group 4,
all channels
Group 0,
Channel 5
Group 1,
Channel 5
Group 2,
Channel 5
Group 3,
Channel 5
Group 4,
Channel 5
Group 0,
Group 1,
Group 2,
Group 3,
Group 4;
Channel 5
Group 1,
Group 2,
Group 3,
Group 4;
Channel 5
110 Reserved
Group 0,
Channel 6
Group 1,
Channel 6
Group 2,
Channel 6
Group 3,
Channel 6
Group 4,
Channel 6
Group 0,
Group 1,
Group 2,
Group 3,
Group 4;
Channel 6
Group 1,
Group 2,
Group 3,
Group 4;
Channel 6
111 Reserved
Group 0,
Channel 7
Group 1,
Channel 7
Group 2,
Channel 7
Group 3,
Channel 7
Group 4,
Channel 7
Group 0,
Group 1,
Group 2,
Group 3,
Group 4;
Channel 7
Group 1,
Group 2,
Group 3,
Group 4;
Channel 7
AD5371
Rev. B | Page 25 of 28
SPECIAL FUNCTION MODE
If the mode bits are 00, the special function mode is selected, as shown in Table 16. Bit I21 to Bit I16 of the serial data-word select the special
function, and the remaining bits are data required for execution of the special function, for example, the channel address for data readback.
The codes for the special functions are shown in
Table 17. Table 18 shows the addresses for data readback.
Table 16. Special Function Mode
I23 I22 I21 I20 I19 I18 I17 I16 I15 I14 I13 I12 I11 I10 I9 I8 I7 I6 I5 I4 I3 I2 I1 I0
0 0 S5 S4 S3 S2 S1 S0 F15 F14 F13 F12 F11 F10 F9 F8 F7 F6 F5 F4 F3 F2 F1 F0
Table 17. Special Function Codes
Special Function Code
S5 S4 S3 S2 S1 S0 Data (F15 to F0) Action
0 0 0 0 0 0 0000 0000 0000 0000 No operation (NOP).
0 0 0 0 0 1 XXXX XXXX XXXX X[F2:F0] Write control register.
F4 = overtemperature indicator (read-only bit). This bit should be 0
when writing to the control register.
F3 = reserved. This bit should be 0 when writing to the control register.
F2 = 1: Select Register X1B for input.
F2 = 0: Select Register X1A for input.
F1 = 1: Enable thermal shutdown mode.
F1 = 0: Disable thermal shutdown mode.
F0 = 1: Software power-down.
F0 = 0: Software power-up.
0 0 0 0 1 0 XX[F13:F0] Write data in F13 to F0 to OFS0 register.
0 0 0 0 1 1 XX[F13:F0] Write data in F13 to F0 to OFS1 register.
0 0 0 1 0 0 XX[F13:F0] Write data in F13 to F0 to OFS2 register.
0 0 0 1 0 1 See Table 18 Select register for readback.
0 0 0 1 1 0 XXXX XXXX [F7:F0] Write data in F7 to F0 to A/B Select Register 0.
0 0 0 1 1 1 XXXX XXXX [F7:F0] Write data in F7 to F0 to A/B Select Register 1.
0 0 1 0 0 0 XXXX XXXX [F7:F0] Write data in F7 to F0 to A/B Select Register 2.
0 0 1 0 0 1 XXXX XXXX [F7:F0] Write data in F7 to F0 to A/B Select Register 3.
0 0 1 0 1 0 XXXX XXXX [F7:F0] Write data in F7 to F0 to A/B Select Register 4.
0 0 1 0 1 1 XXXX XXXX [F7:F0] Block write to A/B select registers.
F7 to F0 = 0: Write all 0s (all channels use the X2A register).
F7 to F0 = 1: Write all 1s (all channels use the X2B register).
0 1 1 1 0 0 Reserved
AD5371
Rev. B | Page 26 of 28
Table 18. Address Codes for Data Readback
1
F15 F14 F13 F12 F11 F10 F9 F8 F7 Register Read
0 0 0 X1A register
0 0 1 X1B register
0 1 0 C register
0 1 1
Bit F12 to Bit F7 select the channel to be read back,
from Channel 0 = 001000 to Channel 39 = 101111
M register
1 0 0 0 0 0 0 0 1 Control register
1 0 0 0 0 0 0 1 0 OFS0 data register
1 0 0 0 0 0 0 1 1 OFS1 data register
1 0 0 0 0 0 1 0 0 OFS2 data register
1 0 0 0 0 0 1 1 0 A/B Select Register 0
1 0 0 0 0 0 1 1 1 A/B Select Register 1
1 0 0 0 0 1 0 0 0 A/B Select Register 2
1 0 0 0 0 1 0 0 1 A/B Select Register 3
1 0 0 0 0 1 0 1 0 A/B Select Register 4
1
Bit F6 to Bit F0 are don’t cares for the data readback function.

AD5371BBCZ-REEL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC 40-CH 14-bit Serial bipolar IC
Lifecycle:
New from this manufacturer.
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