AD5371
Rev. B | Page 27 of 28
APPLICATIONS INFORMATION
POWER SUPPLY DECOUPLING
In any circuit where accuracy is important, careful consideration
of the power supply and ground return layout helps to ensure
the rated performance. Design the PCB on which the AD5371 is
mounted so that the analog and digital sections are separated
and confined to certain areas of the board. If the AD5371 is in a
system where multiple devices require an AGND-to-DGND
connection, make the connection at one point only. Establish the
star ground point as close as possible to the device. For supplies
with multiple pins (V
SS
, V
DD
, DV
CC
), it is recommended that
these pins be tied together and that each supply be decoupled
only once.
The AD5371 should have ample supply decoupling of 10 μF in
parallel with 0.1 μF on each supply, located as close to the package
as possible, ideally right up against the device. The 10 μF capacitors
are the tantalum bead type. The 0.1 μF capacitor should have low
effective series resistance (ESR) and low effective series inductance
(ESI)—typical of the common ceramic types that provide a low
impedance path to ground at high frequencies—to handle transient
currents due to internal logic switching.
Avoid digital lines running under the device because they can
couple noise onto the device. Allow the analog ground plane,
however, to run under the AD5371 to avoid noise coupling. The
power supply lines of the AD5371 should use as large a trace as
possible to provide low impedance paths and reduce the effects of
glitches on the power supply line. Shield fast switching digital
signals with digital ground to avoid radiating noise to other
parts of the board, and never run them near the reference
inputs. It is essential to minimize noise on all VREF lines.
Avoid crossover of digital and analog signals. Run traces on
opposite sides of the board at right angles to each other. This
reduces the effects of feedthrough through the board. A microstrip
technique is by far the best approach, but it is not always possible
with a double-sided board. In this technique, the component side
of the board is dedicated to ground plane, while signal traces
are placed on the solder side.
As is the case for all thin packages, care must be taken to avoid
flexing the package and to avoid a point load on the surface of
this package during the assembly process.
POWER SUPPLY SEQUENCING
When the supplies are connected to the AD5371, it is important
that the AGND and DGND pins be connected to the relevant
ground plane before the positive or negative supplies are applied.
In most applications, this is not an issue because the ground pins
for the power supplies are connected to the ground pins of the
AD5371 via ground planes. When the AD5371 is to be used in a
hot-swap card, care should be taken to ensure that the ground
pins are connected to the supply grounds before the positive or
negative supplies are connected. This is required to prevent
currents from flowing in directions other than toward an analog
or digital ground.
INTERFACING EXAMPLES
The SPI interface of the AD5371 is designed to allow the
part to be easily connected to industry-standard DSPs and
microcontrollers.
Figure 24 shows how the AD5371 connects to
the Analog Devices, Inc., Blackfin® DSP. The Blackfin has an
integrated SPI port that can be connected directly to the SPI
pins of the AD5371, as well as programmable input/output pins
that can be used to set or read the state of the digital input or
output pins associated with the interface.
SPISELx
ADSP-BF531
AD5371
SCK
MOSI
MISO
PF10
PF8
PF9
PF7
SYNC
SCLK
SDI
SDO
RESET
CLR
LDAC
BUSY
05814-023
Figure 24. Interfacing to a Blackfin DSP
The Analog Devices ADSP-21065L is a floating-point DSP with
two serial ports (SPORTs).
Figure 25 shows how one SPORT
can be used to control the AD5371. In this example, the transmit
frame synchronization (TFSx) pin is connected to the receive
frame synchronization (RFSx) pin. Similarly, the transmit and
receive clocks (TCLKx and RCLKx) are also connected. The user
can write to the AD5371 by writing to the transmit register of
the ADSP-21065L. A read operation can be accomplished by
first writing to the AD5371 to tell the part that a read operation
is required. A second write operation with an NOP instruction
causes the data to be read from the AD5371. The DSP receive
interrupt can be used to indicate when the read operation is
complete.
SYNC
SCLK
SDI
SDO
RESET
CLR
LDAC
BUSY
AD5371
ADSP-21065L
TFSx
RFSx
TCLKx
RCLKx
DTxA
DRxA
FLAG
0
FLAG
1
FLAG
2
FLAG
3
05814-024
Figure 25. Interfacing to an ADSP-21065L DSP
