ADE9153A Data Sheet
Rev. 0 | Page 24 of 50
The total active power calculation, AWATT, is updated
every 4 kSPS. With full-scale inputs, the AWATT value is
10,356,306 codes.
The low-pass filter, LPF2, is enabled by default (DISAPLPF = 0)
and must be set to this default value for typical operation. Disable
LPF2 by setting the DISAPLPF bit in the CONFIG0 register.
The following equation indicates how the gain and offset
calibration registers modify the results in the power register:
AWATT =
27
2
1
APGAIN
AWATT
0
+ AWATT_OS
APGAIN is a common gain for all power measurements: active,
reactive, and apparent power measurements.
Fundamental Reactive Power
The ADE9153A offers a fundamental reactive power measurement.
Figure 47 shows the datapath for the fundamental reactive
power calculation.
APGAIN AFVAR_OS
AFVAR
AI_WAV
AV_ WAV
FUNDAMEN TAL
VAR
ENERGY/
POWER/CF
ACCUMUL ATION
16519-147
Figure 47. Fundamental Reactive Power (AFVAR) Datapath
The fundamental reactive power calculation, AFVAR, is
updated every 4 kSPS. With full-scale inputs, the AFVAR value
is 10,356,306 codes.
LPF2 is enabled by default (DISRPLPF = 0) and must be set to
this default value for typical operation. Disable LPF2 by setting
the DISRPLPF bit in the CONFIG0 register.
The following equation indicates how the gain and offset
calibration registers modify the results in the power register:
AFVAR =
27
2
1
APGAIN
AFVAR
0
+ AFVAR_OS
Tota l App arent Power
The ADE9153A offers a total apparent power measurement.
The datapath for the total apparent power calculation is shown
in Figure 48.
AIRMS_OS
APGAIN
AVRMS_OS
AIRMS
AVA
AVRMS
VNOM
LPF2
AI_WAV
x
2
2
15
2
15
LPF2
AV_WAV
ENERGY/
POWER/
CF ACCUMULATION
1
x
2
0
16519-148
Figure 48. Total Apparent Power (AVA) Datapath
The total apparent power calculation, AVA, is updated every
4 kSPS. With full-scale inputs, the AVA value is 10,356,306 codes.
LPF2 is enabled by default (DISRPLPF = 0) and must be set to
this default value for typical operation. Disable LPF2 by setting
the DISRPLPF bit in the CONFIG0 register.
The ADE9153A offers a register, VNOM, to calculate the total
apparent power when the voltage is missing. This register is set
to correspond to a desired voltage rms value. If the VNOMA_
EN bit in the CONFIG0 register is set, the VNOM value is used
instead of AVRMS.
Energy Accumulation, Power Accumulation, and No
Load Detection Features
The ADE9153A calculates total active, fundamental reactive,
and total apparent energy. By default, the accumulation mode is
signed accumulation but can be changed to absolute, positive
only, or negative only for active and reactive energies using the
WATTACC and VARACC bits in the ACCMODE register.
Energy Accumulation
The energy is accumulated into a 42-bit signed internal energy
accumulator at 4 kSPS. The user readable energy register is
signed and 45 bits wide, split between two 32-bit registers as
shown in Figure 49. With full-scale inputs, the user energy
register overflows in 106.3 sec.
f
DSP
INTERNAL ENERGY ACCUMULATOR
+
+
31
41 0
AWATTHR_HI
AT T
0
0
12
1213
AWATTHR_LO
31
16519-149
Figure 49. Internal Energy Accumulator to AWATTHR_HI and AWATTHR_LO
Energy Accumulation Modes
The energy registers can accumulate a user defined number
of samples or half line cycles configured by the EGY_TMR_
MODE bit in the EP_CFG register. Half line cycle accumulation
uses the voltage channel zero crossings. The number of samples
or half line cycles is set in the EGY_TIME register. The maximum
value of EGY_TIME is 8191 decimal. With full-scale inputs, the
internal register overflows in 13.3 sec. For a 50 Hz signal, EGY_
TIME must be lower than 1329 decimal to prevent overflow
during half line cycle accumulation.
After EGY_TIME + 1 samples or half line cycles, the EGYRDY bit
is set in the status register and the energy register is updated.
The data from the internal energy register is added or latched to the
user energy register, depending on the EGY_LD_ACCUM bit
setting in the EP_CFG register.
