ADE9153A Data Sheet
Rev. 0 | Page 4 of 50
Parameter Min Typ Max Unit Test Conditions/Comments
ADC
PGA Gain Settings (xI_PGAGAIN)
Current Channel A (Phase Shunt)
16, 24,
32, 38.4
V/V PGA gain setting is referred to as gain
Current Channel B (Neutral CT) 1, 2, 4 V/V PGA gain setting is referred to as gain
Pseudo Differential Input Voltage
Range
(IAP − IAN) −1/gain +1/gain V 44.19 mV rms on Current Channel A, AI_PGAGAIN = 16×
(VAP − VAN) −0.5 +0.5 V 353.6 mV rms on voltage channel
Differential Input Voltage Range
(IBP − IBN) −1/gain +1/gain V 707 mV rms on Current Channel B
Maximum Operating Voltage on
the Analog Input Pins
VAP 0 1.35 V Voltage on the pin with respect to ground
IAP, IAN −0.1125 +0.1125 V Voltage on the IAx pin with respect to ground
IBP, IBN 0.35 1.45 V
Voltage on the IBx pin with respect to ground;
internal common-mode voltage at IBx pin = 0.9 V
SNR
Current Channel A
AI_PGAGAIN = 16× 90 dB V
IN
is a full-scale signal
AI_PGAGAIN = 38.4× 88 dB V
IN
is a full-scale signal
Current Channel B
BI_PGAGAIN = 1x 90 dB V
IN
is a full-scale signal
BI_PGAGAIN = 4x 78 dB V
IN
is a full-scale signal
Voltage Channel 87 dB V
IN
is a full-scale signal
ADC Output Pass Band (0.1 dB) 0.672 kHz
ADC Output Bandwidth (−3 dB) 1.6 kHz
Crosstalk −120 dB At 50 Hz or 60 Hz; see the Terminology section
AC Power Supply Rejection Ratio
(AC PSRR)
At 50 Hz; see the Terminology section
Current Channel A −115 dB
Current Channel B −100 dB
Voltage Channel −100 dB
AC Common-Mode Rejection Ratio
(AC CMRR)
−120 dB At 50 Hz
ADC Gain Error
Percentage of error from the ideal value; see the
Terminology section
Current Channel A ±0.2 ±1.5 %
Current Channel B −2.0 ±3.5 %
Voltage Channel −0.8 ±3.0 %
ADC Offset
Current Channel A See the Terminology section
AI_PGAGAIN = 16× +0.04 ±0.1 mV
AI_PGAGAIN = 38.4× −0.02 ±0.05 mV
Current Channel B −0.26 ±0.37 mV
Voltage Channel +0.35 ±0.75 mV
ADC Offset Drift ±0.5 ±5 μV/°C See the Terminology section
Data Sheet ADE9153A
Rev. 0 | Page 5 of 50
Parameter Min Typ Max Unit Test Conditions/Comments
Channel Drift (PGA, ADC, Internal
Voltage Reference)
See the Terminology section
Current Channel A ±5 ±30 ppm/°C
Current Channel B ±20 ±50 ppm/°C
Voltage Channel ±20 ±50 ppm/°C
Differential Input Impedance (DC) See the Terminology section
Current Channel A 5000 7800
Current Channel B 100 113
Voltage Channel 240 256
INTERNAL VOLTAGE REFERENCE Nominal = 1.25 V ± 1 mV
Voltage Reference 1.25 V T
A
= 25°C at REFIN
Temperature Coefficient ±5 ±30 ppm/°C
T
A
= −40°C to +85°C; tested during device
characterization
TEMPERATURE SENSOR
Temperature Accuracy ±5 °C −40°C to +85°C
Temperature Readout Step Size 0.3 °C
CRYSTAL OSCILLATOR
All specifications at CLKIN = 12.288 MHz; the crystal
oscillator is designed to interface with 100 μW crystals
Input Clock Frequency 12.287 12.288 12.289 MHz ±100 ppm
Internal Capacitance on CLKIN,
CLKOUT
4 pF
Internal Feedback Resistance
Between CLKIN and CLKOUT
2.58
Transconductance (g
m
) 5 8.7 mA/V
EXTERNAL CLOCK INPUT
Input Clock Frequency, CLKIN 12.287 12.288 12.289 MHz ±100 ppm
Duty Cycle 45:55 50:50 55:45
CLKIN Logic Input Voltage 3.3 V tolerant
High, V
INH
1.2 V
Low, V
INL
0.5 V
LOGIC INPUTS—MOSI/RX, SCLK
Input Voltage
High, V
INH
2.4 V
Low, V
INL
0.8 V
Input Current, I
IN
11 μA V
IN
= 0 V
Input Capacitance, C
IN
10 pF
LOGIC OUTPUTS
MISO/TX, IRQ
Output Voltage
High, V
OH
2.5 V I
SOURCE
= 4 mA
Low, V
OL
0.4 V I
SINK
= 3 mA
Internal Capacitance, C
IN
10 pF
CF1, CF2
Output Voltage
High, V
OH
2.4 V I
SOURCE
= 6 mA
Low, V
OL
0.8 V I
SINK
= 6 mA
Internal Capacitance, C
IN
10 pF
LOW DROPOUT REGULATORS (LDOs)
AVDD 1.9 V
DVDD 1.7 V
VDD2P5 2.5 V
ADE9153A Data Sheet
Rev. 0 | Page 6 of 50
Parameter Min Typ Max Unit Test Conditions/Comments
POWER SUPPLY For specified performance
VDD Pin 2.97 3.63 V Minimum = 3.3 V − 10%; maximum = 3.3 V + 10%
VDD Pin Current, I
DD
9.3 12 mA Consumption in operation, without mSure running
8.5 μA When the ADE9153A is held in reset
AUTOCALIBRATION
VDD = 3.3 V, AGND = DGND = 0 V, on-chip reference, CLKIN = 12.288 MHz, T
A
= 25°C (typical), I
MAX
= 60 A rms, V
NOM
= 230 V,
R
SHUNT_PHASE
= 200 μΩ, turns ratio on CT
NEUTRAL
= 2500:1, burden on CT
NEUTRAL
= 16.4 Ω, and CT
NEUTRAL
voltage potential divider of 1000:1
(990 kΩ and 1 kΩ resistors), unless otherwise noted. The values in Table 2 are specified for the system described; if the shunt or voltage
potential divider is changed, the values in Table 2 change as well. For example, increasing the shunt value decreases the calibration time
required for the phase current channel; conversely, decreasing the shunt value increases the calibration time.
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
AUTOCALIBRATION T
A
= 25°C ±5 °C
Current Channel A (Phase Shunt)
Calibration Time
Turbo Mode
For more information on the power modes
and calibration times, see the mSure
Autocalibration Feature section
0.353% Accuracy Target 16 sec
0.25% Accuracy Target 45 sec
Normal Mode
0.353% Accuracy Target 40 sec
0.25% Accuracy Target 115 sec
Current Consumption Additional consumption from 3.3 V supply
Turbo Mode 16 mA rms With peak consumption of 33 mA
Normal Mode 9.3 mA rms With peak consumption of 19 mA
Current Channel (Neutral CT)
Calibration Time
For more information, see the mSure
Autocalibration Feature section
0.5 % Accuracy Target,
Turbo Mode 12 sec
Normal Mode 20 sec
Current Consumption Additional consumption from 3.3 V supply
Turbo Mode 16 mA rms With peak consumption of 33 mA
Normal Mode 9.3 mA rms With peak consumption of 19 mA
Voltage Channel
Calibration Time
For more information, see the mSure
Autocalibration Feature section
0.353% Accuracy Target 25 sec
0.25% Accuracy Target 85 sec
Current Consumption <1 mA rms Additional consumption from 3.3 V supply

ADE9153AACPZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Data Acquisition ADCs/DACs - Specialized 1 PH Mtr IC w/ Auto Calibration
Lifecycle:
New from this manufacturer.
Delivery:
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