NXP Semiconductors
NHS3152
Therapy adherence resistive monitor
NHS3152 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
Product data sheet Rev. 3.03 — 15 June 2018
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8.10.2 General description
The SPI/SSP is a Synchronous Serial Port (SSP) controller capable of operation on an
SPI, 4-wire SSI, or Microwire bus. It can interact with multiple masters and slaves on
the bus. Only a single master and a single slave can communicate on the bus during a
given data transfer. Data transfers are in principle full duplex, with frames from 4 bits to
16 bits of bidirectional data flowing between master and slave. In practice, often only one
of these two data flows carries meaningful data.
8.10.3 Pin description
Table 12. SPI pin description
Pin
name
Type Interface
pin SPI
SSI Microwire Description
SCLK I/O SCLK CLK SK serial clock
SSEL I/O SSEL FS CS frame sync/slave select
MISO I/O MISO DR (M)
DX (S)
SI (M)
SO (S)
master input slave output
MOSI I/O MOSI DX (M)
DR (S)
SO (M)
SI (S)
master output slave input
8.10.3.1 Pin detailed description
Serial clock
SCK/CLK/SK is a clock signal used to synchronize the transfer of data. The master
drives the clock signal and the slave receives it. When SPI/SSP interface is used, the
clock is programmable to be active HIGH or active LOW, otherwise it is always active
HIGH. SCK only switches during a data transfer. At any other time, the SPI/SSP interface
either stays in its inactive state or is not driven (remains in high-impedance state).
Frame sync/slave select
When the SPI/SSP interface is a bus master, it drives this signal to an active state before
the start of serial data. It then releases it to an inactive state after the data has been
sent. The active state can be HIGH or LOW depending upon the selected bus and mode.
When the SPI/SSP interface is a bus slave, this signal qualifies the presence of data from
the master according to the protocol in use.
When there is only one master and slave, the master signals, frame sync, or slave select,
can be connected directly to the corresponding slave input. When there are multiple
slaves, further qualification of frame sync/slave select inputs is normally necessary to
prevent more than one slave from responding to a transfer.
Master Input Slave Output (MISO)
The MISO signal transfers serial data from the slave to the master. When the SPI/SSP
is a slave, it outputs serial data on this signal. When the SPI/SSP is a master, it clocks in
serial data from this signal. It does not drive this signal and leaves it in a high-impedance
state when the SPI/SSP is a slave and not selected by FS/SSEL.
Master Output Slave Input (MOSI)
