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NHS3152UK/A1Z

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51
NXP Semiconductors
NHS3152
Therapy adherence resistive monitor
NHS3152 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
Product data sheet Rev. 3.03 — 15 June 2018
34 / 51
8.20 Using NHS3152 to measure resistance
8.20.1 Measurement principle
The two terminals of the device under test (DUT) can be connected to any of the external
analog input pins. The routing of input pins to the ADC/DAC and I2D are done by
configuring the input multiplexer registers of the ADC/DAC and I2D.
Configure the ADC/DAC and I2D as shown in Figure 14.
aaa-018786
NHS3152
DAC
ADC
V
DUT
I
DUT
I2D
Figure 14. Connection of DUT to NHS3152 and settings of the ADC/DAC and I2D
Apply the desired bias voltage to the first terminal (preferably as high as possible), and
sequentially measure the voltage and current on the second terminal. The resistance is
found by dividing the measured voltage drop with the measured current through the DUT.
The effective measurement resolution of the resistance value depends on the selected
input range of the I2D. For high currents (low-resistance values) relative to the range
settings, the resolution is limited by the ADC/DAC. For high resistances (low currents),
the I2D is limiting. Refer to Table 19 for different recommended combinations.
Table 19. Resolution of resistance measurement in different ranges
I2D
range
Recommended
R
min
Recommended
R
max
Resolution at
R
max
(bit)
Resolution at
R
max
Resolution at
R
min
(bit)
Resolution at
R
min
2.5 µA 40 kΩ 7 MΩ 6.2 95 kΩ 8.9 83.7 Ω
25 µA 4 kΩ 1.4 MΩ 5.5 31 kΩ 8.9 8.4 Ω
250 µA 400 Ω 140 kΩ 5.0 4.38 kΩ 8.9 0.83 Ω
8.21 Serial Wire Debug (SWD)
The debug functions are integrated into the ARM Cortex-M0+. Serial Wire Debug (SWD)
functions are supported. The ARM Cortex-M0+ is configured to support up to four
breakpoints and two watchpoints.
• Supports ARM SWD mode
• Direct debug access to all memories, registers, and peripherals
• No target resources are required for the debugging session
• Four breakpoints
Four instruction breakpoints that can also be used to remap instruction addresses for
code patches. Two data comparators that can be used to remap addresses for patches
to literal values.
• Two data watchpoints that can also be used as triggers
NXP Semiconductors
NHS3152
Therapy adherence resistive monitor
NHS3152 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
Product data sheet Rev. 3.03 — 15 June 2018
35 / 51
8.22 On-chip flash memory
The NHS3152 contains a 32 kB flash memory of which 30 kB can be used as program
and data memory.
The flash is organized in 32 sectors of 1 kB. Each sector consists of 16 rows of 16 × 32-
bit words.
8.22.1 Reading from flash
Reading is done via the AHB interface. The memory is mapped on the bus address
space as a contiguous address space. Memory data words are seen on the bus using a
little endian arrangement.
8.22.2 Writing to flash
Writing to flash means copying a word of data over the AHB to the page buffer of the
flash. It does not actually program the data in the memory array. This programming is
done by subsequent erase and program cycles.
NXP Semiconductors
NHS3152
Therapy adherence resistive monitor
NHS3152 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
Product data sheet Rev. 3.03 — 15 June 2018
36 / 51
8.22.3 Erasing/programming flash
Erasing and programming are separate operations. Both are possible only on memory
sectors that are unprotected and unlocked. Protect/lock information is stored inside the
memory itself, so the controller is not aware of protection status. Therefore, if a program/
erase operation is performed on a protected or locked sector, it does not flag an error.
Protection
At exit from reset, all sectors are protected against accidental modification. To allow
modification, a sector must be unprotected. It can then be protected again after that the
modification is performed.
Locking
Each flash sector has a lock bit. Lock bits can be set but cannot be cleared. Locked
sectors cannot be erased and reprogramed.
8.23 On-chip SRAM
The NHS3152 contains a total of 8 kB on-chip SRAM memory configured as
256 × 2 × 4 × 32 bit.
8.24 On-chip EEPROM
The NHS3152 contains a 4 kB EEPROM. This EEPROM is organized in 64 rows of
32 × 16-bit words. Of these rows, the last four contain calibration and test data and are
locked. This data is either used by the boot loader after reset, or made accessible to the
application via firmware Application Programming Interface (API).
8.24.1 Reading from EEPROM
Reading is done via the AHB interface. The memory is mapped on the bus address
space, as a contiguous address space. Memory data words are seen on the bus using a
little endian arrangement.
8.24.2 Writing to EEPROM
Erasing and programming is performed, as a single operation, on one or more words
inside a single page.
Previous write operations have transferred the data to be programmed into the memory
page buffer. The page buffer tracks which words were written to (offset within the page
only). Words not written to, retain their previous content.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51

NHS3152UK/A1Z

Mfr. #:
Buy NHS3152UK/A1Z
Manufacturer:
NXP Semiconductors
Description:
Board Mount Temperature Sensors NTAG NHS3152 NFC Therapy Adherence
Lifecycle:
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