NXP Semiconductors
NHS3152
Therapy adherence resistive monitor
NHS3152 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
Product data sheet Rev. 3.03 — 15 June 2018
28 / 51
8.13 32-bit timer
8.13.1 Features
One 32-bit timer with a programmable 32-bit prescaler.
Timer operation
Four 32-bit match registers that allow:
Continuous operation with optional interrupt generation on match
Stop timer on match with optional interrupt generation
Reset timer on match with optional interrupt generation
Up to two CT32B external outputs corresponding to the match registers with the
following capabilities:
Set LOW on match
Set HIGH on match
Toggle on match
Do nothing on match
Up to two match registers can be configured as PWM allowing the use of up to two
match outputs as single edge controlled PWM outputs
8.13.2 General description
The peripheral clock (PCLK), which is derived from the system clock, clocks the timer.
The timer can optionally generate interrupts or perform other actions at specified timer
values based on four match registers. The peripheral clock is provided by the system
clock.
Each timer also includes one capture input to trap the timer value when an input signal
transitions, optionally generating an interrupt.
In PWM mode, four match registers can be used to provide a single-edge controlled
PWM output on the match output pins. Use of the match registers that are not pinned out
to control the PWM cycle length is recommended.
NXP Semiconductors
NHS3152
Therapy adherence resistive monitor
NHS3152 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
Product data sheet Rev. 3.03 — 15 June 2018
29 / 51
8.14 Watchdog Timer (WDT)
If the microcontroller enters an erroneous state, the purpose of the Watchdog Timer
(WDT) is to reset it within a reasonable amount of time.
When enabled, if the user program fails to feed (or reload) the WDT within a
predetermined amount of time, the WDT generates a system reset.
8.14.1 Features
If not periodically reloaded, it internally resets the microcontroller
Debug mode
Enabled by software but requires a hardware reset or a WDT reset/interrupt to be
disabled
If enabled, incorrect/incomplete feed sequence causes reset/interrupt
Flag to indicate WDT reset
Programmable 24-bit timer with internal prescaler
Selectable time period from (TWDCLK × 256 × 4) to (TWDCLK × 2
24
× 4) in multiples
of TWDCLK × 4
The WDT clock (WDCLK) source is a 2 MHz clock derived from the SFRO, or the
external clock as set by the SYSCLKCTRL register
8.14.2 General description
The WDT consists of a divide by 4 fixed prescaler and a 24-bit counter. The clock is fed
to the timer via a prescaler. The timer decrements when clocked. The minimum value by
which the counter is decremented is 0xFF. Setting a value lower than 0xFF causes 0xFF
to be loaded in the counter. Hence the minimum WDT interval is (TWDCLK × 256 × 4)
and the maximum is (TWDCLK × 2
24
× 4), in multiples of (TWDCLK × 4).
8.15 System tick timer
8.15.1 Features
Simple 24-bit timer
Uses dedicated exception vector
Clocked internally by the system clock or the system clock divided by two
8.15.2 General description
The SYSTICK timer is a part of the Cortex-M0+. The SYSTICK timer can be used to
generate a fixed periodic interrupt for use by an operating system or other system.
Since the SYSTICK timer is a part of the Cortex-M0+, it facilitates porting of software by
providing a standard timer available on Cortex-M0+ based devices. The SYSTICK timer
can be used for management software.
Refer to the Cortex-M0+ Devices - Generic User Guide (Ref. 2) for details.
NXP Semiconductors
NHS3152
Therapy adherence resistive monitor
NHS3152 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
Product data sheet Rev. 3.03 — 15 June 2018
30 / 51
8.16 Real-Time Clock (RTC) timer
8.16.1 Features
The Real-Time Clock (RTC) block contains two counters:
A countdown timer generating a wake-up signal when it expires
A continuous counter that counts seconds since power-up or the last system reset
The countdown timer runs on a low speed clock and runs in an always-on power domain.
The delay, as well as a clock tuning prescaler, can be configured via the APB bus. The
RTC countdown timer generates both the deep power-down wake-up signal and the RTC
interrupt signal (wake-up interrupt 12). The deep power-down wake-up signal is always
generated, while the interrupt can be masked according to the settings in the RTCIMSC
register.
8.16.2 General description
The RTC module consists of two parts:
The RTC core module, implementing the RTC timers themselves. This module runs in
the always-on VDD_ALON domain.
The AMBA APB slave interface. This module allows configuration of the RTC core via
an APB bus. This module runs in the switched power domain.
8.17 Temperature sensor
8.17.1 Features
The temperature sensor block measures the chip temperature and outputs a raw value or
a calibrated value in Kelvin.
8.17.2 General description
The temperature is measured using a high-precision, zoom-ADC. The analog part is able
to measure a highly temperature-dependent X = V
be
/ ΔV
be
1
. It determines the value of X
by first applying a coarse search (successive approximation), and then a sigma-delta in a
limited range. The conversion time depends on the resolution mode as shown in
Unresolved cross reference!
#unique_71/unique_71_Connect_42_id_8dc764e3-5e9a-480e-904a-f1e62e66a98d.
Table 13. Conversion time for different resolution of TSENS
Resolution (bit) Resolution (°C) Conversion time (ms)
7 ±0.8 4
8 ±0.4 7
9 ±0.2 14
1 V
be
is the base-emitter voltage of a bipolar transistor. Basically, the temperature sensor measures the
voltage drop over a diode formed by the base-emitter junction of a bipolar transistor. It compares the V
be
at different current levels (from which follows the ΔV
be
).

NHS3152UK/A1Z

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NXP Semiconductors
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Board Mount Temperature Sensors NTAG NHS3152 NFC Therapy Adherence
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