1. General description
The P82B96 is a bipolar IC that creates a non-latching, bidirectional, logic interface
between the normal I
2
C-bus and a range of other bus configurations. It can interface
I
2
C-bus logic signals to similar buses having different voltage and current levels.
For example, it can interface to the 350 µA SMBus, to 3.3 V logic devices, and to 15 V
levels and/or low-impedance lines to improve noise immunity on longer bus lengths.
It achieves this interface without any restrictions on the normal I
2
C-bus protocols or clock
speed. The IC adds minimal loading to the I
2
C-bus node, and loadings of the new bus or
remote I
2
C-bus nodes are not transmitted or transformed to the local node. Restrictions
on the number of I
2
C-bus devices in a system, or the physical separation between them,
are virtually eliminated. Transmitting SDA and SCL signals via balanced transmission
lines (twisted pairs) or with galvanic isolation (opto-coupling) is simple because separate
directional Tx and Rx signals are provided. The Tx and Rx signals may be directly
connected, without causing latching, to provide an alternative bidirectional signal line with
I
2
C-bus properties.
2. Features
n Bidirectional data transfer of I
2
C-bus signals
n Isolates capacitance allowing 400 pF on Sx/Sy side and 4000 pF on Tx/Ty side
n Tx/Ty outputs have 60 mA sink capability for driving low-impedance or high capacitive
buses
n 400 kHz operation over at least 20 meters of wire (see
AN10148
)
n Supply voltage range of 2 V to 15 V with I
2
C-bus logic levels on Sx/Sy side
independent of supply voltage
n Splits I
2
C-bus signal into pairs of forward/reverse Tx/Rx, Ty/Ry signals for interface
with opto-electrical isolators and similar devices that need unidirectional input and
output signal paths.
n Low power supply current
n ESD protection exceeds 3500 V HBM per JESD22-A114, 250 V DIP package, 400 V
SO package MM per JESD22-A115, and 1000 V CDM per JESD22-C101
n Latch-up free (bipolar process with no latching structures)
n Packages offered: DIP8, SO8 and TSSOP8
P82B96
Dual bidirectional bus buffer
Rev. 08 — 10 November 2009 Product data sheet
P82B96_8 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 08 — 10 November 2009 2 of 32
NXP Semiconductors
P82B96
Dual bidirectional bus buffer
3. Applications
n Interface between I
2
C-buses operating at different logic levels (for example, 5 V and
3 V or 15 V)
n Interface between I
2
C-bus and SMBus (350 µA) standard
n Simple conversion of I
2
C-bus SDA or SCL signals to multi-drop differential bus
hardware, for example, via compatible PCA82C250
n Interfaces with opto-couplers to provide opto-isolation between I
2
C-bus nodes up to
400 kHz
4. Ordering information
4.1 Ordering options
Table 1. Ordering information
Type number Package
Name Description Version
P82B96DP TSSOP8 plastic thin shrink small outline package; 8 leads;
body width 3 mm
SOT505-1
P82B96PN DIP8 plastic dual in-line package; 8 leads (300 mil) SOT97-1
P82B96TD SO8 plastic small outline package; 8 leads;
body width 3.9 mm
SOT96-1
P82B96TD/S900 SO8 plastic small outline package; 8 leads;
body width 3.9 mm
SOT96-1
Table 2. Ordering options
Type number Topside mark Temperature range
P82B96DP 82B96 40 °C to +85 °C
P82B96PN P82B96PN 40 °C to +85 °C
P82B96TD P82B96T 40 °C to +85 °C
P82B96TD/S900 P82B96T 40 °C to +125 °C
P82B96_8 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 08 — 10 November 2009 3 of 32
NXP Semiconductors
P82B96
Dual bidirectional bus buffer
5. Block diagram
6. Pinning information
6.1 Pinning
6.2 Pin description
Fig 1. Block diagram of P82B96
P82B96
Sx (SDA)
Rx (RxD, SDA)
Sy (SCL)
Tx (TxD, SDA)
Ty (TxD, SCL)
GND
Ry (RxD, SCL)
002aab976
V
CC
(2 V to 15 V)
8
1
7
4
3
2
5
6
Fig 2. Pin configuration for DIP8 Fig 3. Pin configuration for SO8 Fig 4. Pin configuration for
TSSOP8
P82B96PN
Sx V
CC
Rx Sy
Tx Ry
GND Ty
002aab977
1
2
3
4
6
5
8
7
P82B96TD
P82B96TD/S900
Sx V
CC
Rx Sy
Tx Ry
GND Ty
002aab978
1
2
3
4
6
5
8
7
P82B96DP
Sx V
CC
Rx Sy
Tx Ry
GND Ty
002aab979
1
2
3
4
6
5
8
7
Table 3. Pin description
Symbol Pin Description
Sx 1 I
2
C-bus (SDA or SCL)
Rx 2 receive signal
Tx 3 transmit signal
GND 4 negative supply
Ty 5 transmit signal
Ry 6 receive signal
Sy 7 I
2
C-bus (SDA or SCL)
V
CC
8 positive supply voltage

P82B96TD/S900,118

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Interface - Signal Buffers, Repeaters Dual bidirectional Bus buffer
Lifecycle:
New from this manufacturer.
Delivery:
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