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TDA8594SD/N1S,112

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P49
TDA8594 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 11 June 2013 16 of 49
NXP Semiconductors
TDA8594
I
2
C-bus controlled 4 50 W power amplifier
7.14 Offset detection
The offset detection can be performed with no input signal (for instance when the digital
signal processor is in mute after a start-up) or with an input signal. In I
2
C-bus mode, if an
I
2
C-bus read of the output offset is performed, the I
2
C-bus latches DBx[D2] will be set.
When the amplifier BTL output voltage is within a window with a threshold of 1.75 V
typical, the latches DBx[D2] are reset and setting is disabled. If, for instance, after 1
second an I
2
C-bus read is performed again and the offset bits are still set, the output has
not crossed the offset threshold during the last 1 second (see Figure 11
). This can mean
the applied frequency is below 1 Hz (I
2
C-bus read interval = 1 s) or an output offset of
more than 1.75 V is present.
7.15 DC load detection
When the DC load detection is enabled with IB1[D1], a DC offset is slowly applied at the
output of the amplifiers during the start-up cycle and the load currents are measured.
Different load levels will be detected to differentiate between normal load, line driver load
or open load.
Offset detection no no no
Load detection no no no
Overvoltage yes no yes
Table 4. Diagnostic information availability
…continued
Diagnostic information I
2
C-bus mode Legacy mode
DIAG pin STB pin DIAG pin
Fig 11. Offset detection
001aad175
reset:
setting
disabled
offset
threshold
V
O
= V
OUT+
− V
OUT−
V
O
= V
OUT+
− V
OUT−
I
2
C-bus mode only
offset
threshold
t = 1 s:
read = no offset
DB1 bit D2 reset
t = 1 s:
read = offset
DB1 bit D2 set
read = set bit
t
t
TDA8594 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 11 June 2013 17 of 49
NXP Semiconductors
TDA8594
I
2
C-bus controlled 4 50 W power amplifier
If the amplifier is used as line driver and the external booster has an input impedance of
more than 100 and less than 800 (DC-coupled), the DC load bits will contain
DBx[D5:D4] = 10, independent of the gain setting (see Table 5
).
By reading the I
2
C-bus bits the microprocessor can determine, after the start-up of the
amplifier, whether a speaker or an external booster is connected.
Depending on these bits, the amplifier gain can be selected, 26 dB for normal mode or
16 dB for line driver mode. If the gain select is performed when the amplifier is muted, the
gain select will be pop free.
The DC load bits are combined with the AC load bits and are only valid when the AC load
detection is disabled. When the AC load detection is enabled (IB1[D2] = 1), the bits
DBx[D4] will show the content of the AC load detection. When the AC load detection is
disabled again, bit DBx[D4] will show the content of the DC load measurement, which was
stored during the AC load measurement. The AC load detection can only be performed
after the amplifier has completed its start-up cycle and will not conflict with the DC load
detection.
7.16 AC load detection
The AC load detection, enabled with IB1[D2] = 1, is used to detect if AC-coupled
speakers, for example tweeters, are connected correctly during assembly. The detection
is audible because a sine wave of a certain frequency (e.g. 19 kHz) needs to be applied to
the inputs of the amplifier. The output voltage over the load impedance will generate an
amplifier current. If the amplifier peak current triggers a 460 mA (peak) threshold detector
three times, the AC load detection bit will be set. A three ‘threshold cross’ counter is used
to prevent false AC load detection when switching the input signal on or off.
An AC-coupled speaker will reduce the impedance at the output of the amplifier in a
certain frequency band. The presence of an AC-coupled speaker can be determined
using 460 mA (peak) and 230 mA (peak) threshold current detection. For instance, at an
output voltage of 2 V (peak) the total impedance must be less than 4 to detect the
AC-coupled load, or more than 8 to guarantee only a DC connection is detected.
Fig 12. DC load detection levels
Table 5. DC load detection
DC load bits Meaning (when IB1[D2] = 0)
DBx[D5] DBx[D4]
0 0 normal load
1 0 line driver load
1 1 open load
0 1 not valid
001aad176
20 Ω 800 Ω100 Ω 5 kΩ
LOAD
DETECTION
LEVEL
NORMAL LINE DRIVER MODE OPEN-CIRCUIT
TDA8594 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 11 June 2013 18 of 49
NXP Semiconductors
TDA8594
I
2
C-bus controlled 4 50 W power amplifier
The interpretation of line driver and normal mode DC load bit settings for AC load
detection is shown in Table 6
.
When bit IB1[D2] = 1, the AC load detection is enabled. The AC load detection can only
be performed after the amplifier has completed its start-up cycle and will not conflict with
the DC load detection.
7.17 I
2
C-bus diagnostic readout
The diagnostic information of the amplifier can be read via the I
2
C-bus. The I
2
C-bus bits
are set on a failure and will be reset with the I
2
C-bus read command. Even when the
failure is removed, the microprocessor will know what was wrong by reading the I
2
C-bus.
The consequence of this procedure is that old information is read during the I
2
C-bus
readout. Most actual information will be gathered after two successive read commands.
The DIAG pin will give actual diagnostic information (when selected). When a failure is
removed, the DIAG pin will be released instantly, independently of the I
2
C-bus latches.
Table 6. AC load detection
DBx[D4] Meaning (when IB1[D2] = 1)
0 no AC load detected
1 AC load detected
(1) I
th(o)det(load)AC
< 230 mA (no load detection level)
(2) I
th(o)det(load)AC
> 460 mA (load detection level)
Fig 13. AC load impedance as a function of peak output voltage
V
oM
(V)
0 54231
001aad177
8
12
4
16
20
|Z
th(load)
|
(Ω)
0
(1)
(2)
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P49

TDA8594SD/N1S,112

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NXP Semiconductors
Description:
Audio Amplifiers GEN PURP 75W 45dB
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