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TDA8594SD/N1S,112

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P49
TDA8594 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 11 June 2013 28 of 49
NXP Semiconductors
TDA8594
I
2
C-bus controlled 4 50 W power amplifier
Mode select and second clip detection: pin STB
V
STB
voltage on pin STB Standby mode selected
I
2
C-bus mode - - 1 V
legacy mode (I
2
C-bus off) - - 1 V
mute selected
legacy mode (I
2
C-bus off) 2.5 - 4.5 V
Operating mode selected
I
2
C-bus mode 2.5 - V
P
V
legacy mode (I
2
C-bus off) 6.5 - V
P
V
low voltage on pin STB when
pulled down during clipping
[2]
I
STB
= 150 A5.6-6.1V
I
STB
= 500 A6.1-7.2V
I
STB
current on pin STB V
STB
=0Vto8.5V
clip detection not active;
I
2
C-bus mode
-430A
legacy mode - 10 70 A
Start-up, shut-down and mute timing
t
wake
wake-up time time after wake-up via STB pin
before first I
2
C-bus transmission
is recognized; see Figure 3
- 300 500 s
I
LO(SVR)
output leakage current on pin
SVR
--10A
t
d(mute_off)
mute off delay time 10 % of output signal; I
LO
= 0 A
[3]
I
2
C-bus mode;
with I
LO
=10A +15 ms;
no DC load (IB1[D1] = 0);
low pop disabled (IB2[D3] = 1);
see Figure 3
295 465 795 ms
I
2
C-bus mode;
with I
LO
=10A +20 ms;
DC load active (IB1[D1] = 1);
low pop disabled (IB2[D3] = 1);
see Figure 4
500 640 940 ms
I
2
C-bus mode;
with I
LO
=10A +20 ms;
DC load active (IB1[D1] = 1);
low pop enabled (IB2[D3] = 0);
see Figure 5
640 830 1190 ms
legacy mode;
with I
LO
=10A +20 ms;
V
STB
=7V; R
ADSEL
=0;
see Figure 6
430 650 1030 ms
Table 17. Characteristics
…continued
Refer to Figure 29 at V
P
=V
P1
=V
P2
= 14.4 V; R
L
=4
; f = 1 kHz; R
S
=0
; normal mode; unless otherwise specified.
Tested at T
amb
=25
C; guaranteed for T
amb
=
40
C to +105
C.
Symbol Parameter Conditions Min Typ Max Unit
TDA8594 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 11 June 2013 29 of 49
NXP Semiconductors
TDA8594
I
2
C-bus controlled 4 50 W power amplifier
t
amp_on
amplifier on time time from amplifier mute to
amplifier on; 90 % of output
signal; I
LO
= 0 A
[3]
I
2
C-bus mode;
with I
LO
=10A +30 ms;
no DC load (IB1[D1] = 0);
low pop disabled (IB2[D3] = 1);
see Figure 3
360 520 870 ms
I
2
C-bus mode;
with I
LO
=10A +35 ms;
DC load active (IB1[D1] = 1);
low pop disabled (IB2[D3] = 1);
see Figure 4
565 695 1015 ms
I
2
C-bus mode;
with I
LO
=10A +30 ms;
DC load active (IB1[D1] = 1);
low pop enabled (IB2[D3] = 0);
see Figure 5
710 890 1270 ms
legacy mode;
with I
LO
=10A +20 ms;
V
STB
=7V; R
ADSEL
=0;
see Figure 6
510 720 1120 ms
t
off
amplifier switch-off time time to DC output voltage < 0.1 V;
I
2
C-bus mode; I
LO
=0A
[3]
with I
LO
=10A +0 ms;
low pop enabled (IB2[D3] = 0);
see Figure 4
120 245 530 ms
with I
LO
=10A +0 ms;
low pop disabled (IB2[D3] = 1);
see Figure 5
140 280 620 ms
t
d(mute-on)
mute to on delay time from 10 % to 90 % of output
signal; IB2[D1] and IB2[D2] = 1 to
0; V
i
=50mV; see Figure 6
-2040ms
t
d(soft_mute)
soft mute delay time from 90 % to 10 % of output
signal; V
i
= 50 mV; IB2[D1] and
IB2[D2] = 0 to 1 (soft mute);
see Figure 6
-2040ms
t
d(fast_mute)
fast mute delay time from 90 % to 10 % of output
signal; V
STB
from 8 V to 1.3 V
(fast mute); see Figure 6
-0.11ms
t
(start-Vo(off))
engine start to output off time V
P
from 14.4 V to 7 V; V
o
<0.5V;
see Figure 8
-0.11ms
t
(start-SVRoff)
engine start to SVR off time V
P
from 14.4 V to 7 V;
V
SVR
< 2 V; see Figure 8
-4075ms
I
2
C-bus interface
[4]
V
IL
LOW-level input voltage pins SCL and SDA - - 1.5 V
V
IH
HIGH-level input voltage pins SCL and SDA 2.3 - 5.5 V
V
OL
LOW-level output voltage pin SDA; I
L
= 5 mA - - 0.4 V
Table 17. Characteristics …continued
Refer to Figure 29 at V
P
=V
P1
=V
P2
= 14.4 V; R
L
=4
; f = 1 kHz; R
S
=0
; normal mode; unless otherwise specified.
Tested at T
amb
=25
C; guaranteed for T
amb
=
40
C to +105
C.
Symbol Parameter Conditions Min Typ Max Unit
TDA8594 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 11 June 2013 30 of 49
NXP Semiconductors
TDA8594
I
2
C-bus controlled 4 50 W power amplifier
f
SCL
SCL clock frequency - 400 - kHz
R
ADSEL
resistance on pin ADSEL I
2
C-bus address
A[6:0] = 110 1100
155 - - k
I
2
C-bus address
A[6:0] = 110 1101
42 51 57 k
I
2
C-bus address
A[6:0] = 110 1111
71015k
legacy mode - - 0.5 k
Diagnostic
V
OL(DIAG)
LOW-level output voltage on
pin DIAG
fault condition; I
DIAG
= 1 mA - - 0.3 V
V
O(offset_det)
output voltage at offset
detection
1.5 1.75 2.2 V
THD
clip
total harmonic distortion clip
detection level
IB2[D7:D6] = 10 5 10 18 %
IB2[D7:D6] = 01 3 5 9 %
IB2[D7:D6] = 00 1 2 3 %
THD
clip
total harmonic distortion clip
detection level variation
no overlap between IB2[D7:D6] =
10 and IB2[D7:D6] = 01
149%
no overlap between IB2[D7:D6] =
01 and IB2[D7:D6] = 00
13.56%
T
j(AV)(pwarn)
pre-warning average junction
temperature
IB3[D4] = 0 135 145 155 C
IB3[D4] = 1 112 122 132 C
T
j(AV)(G(0.5dB))
average junction temperature
for 0.5 dB gain reduction
V
i
= 0.05 V 150 155 160 C
T
j(pw-G(0.5dB))
prewarning to 0.5 dB gain
reduction junction
temperature difference
71013C
T
j(G(0.5dB)-of)
junction temperature
difference between 0.5 dB
gain reduction and off
from thermal foldback to when all
outputs are switched off
10 15 20 C
G
(th_fold)
gain reduction of thermal
foldback
all channels switched off - 20 - dB
Z
th(load)
load detection threshold
impedance
I
2
C-bus mode
normal load detection - - 20
line driver load detection 100 - 800
Z
th(open)
open load detection threshold
impedance
I
2
C-bus mode 5000 - -
I
th(o)det(load)AC
AC load detection output
threshold current
I
2
C-bus mode
AC load bit is set 460 - - mA
AC load bit is not set - - 230 mA
Table 17. Characteristics
…continued
Refer to Figure 29 at V
P
=V
P1
=V
P2
= 14.4 V; R
L
=4
; f = 1 kHz; R
S
=0
; normal mode; unless otherwise specified.
Tested at T
amb
=25
C; guaranteed for T
amb
=
40
C to +105
C.
Symbol Parameter Conditions Min Typ Max Unit
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P49

TDA8594SD/N1S,112

Mfr. #:
Buy TDA8594SD/N1S,112
Manufacturer:
NXP Semiconductors
Description:
Audio Amplifiers GEN PURP 75W 45dB
Lifecycle:
New from this manufacturer.
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