TDA8594 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 11 June 2013 22 of 49
NXP Semiconductors
TDA8594
I
2
C-bus controlled 4 50 W power amplifier
8.2 Data bytes
I
2
C-bus mode:
• If bit R/W = 1, the TDA8594 sends four data bytes to the microprocessor: DB1, DB2,
DB3, and DB4
• All bits except DB1[D7] and DB3[D7] are latched.
• All bits except DBx[D4] and DBx[D5] are reset after a read operation. Bit DBx[D2] is
set after a read operation; see Section 7.14
• For explanation of AC and DC load detection bits; see Section 7.15 and Section 7.16.
D0 fast mute all amplifier channels (mute delay 100 s)
0=no mute
1=mute
Table 10. Instruction byte IB3
Bit Description
D7 don’t care
D6 amplifier channel 1 and channel 3 gain select
0=26dB
1=16dB
D5 amplifier channel 2 and channel 4 gain select
0=26dB
1=16dB
D4 temperature pre-warning level
0 = warning level on 145 C
1 = warning level on 122 C
D3 disable channel 3
0 = channel 3 enabled
1 = channel 3 disabled
D2 disable channel 1
0 = channel 1 enabled
1 = channel 1 disabled
D1 disable channel 4
0 = channel 4 enabled
1 = channel 4 disabled
D0 disable channel 2
0 = channel 2 enabled
1 = channel 2 disabled
Table 9. Instruction byte IB2
…continued
Bit Description
