TDA8594 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 11 June 2013 32 of 49
NXP Semiconductors
TDA8594
I
2
C-bus controlled 4 50 W power amplifier
[1] Operation above 16 V in a 2 mode with reactive load can trigger the amplifier protection. The amplifier switches off and will restart
after 16 ms resulting in an ‘audio hole’.
[2] V
STB
depends on the current into the STB pin: minimum = (1429 I
STB
) + 5.4 V, maximum = (3143 I
STB
)+5.6V.
[3] The times are specified without leakage current. For a leakage current of 10 A on the SVR pin, the delta time is specified. If the
capacitor value on the SVR pin changes with 30 %, the specified time will also change with 30 %. The specified times include an
Equivalent Series Resistance (ESR) of 15 for the capacitor on the SVR pin.
[4] Standard I
2
C-bus specification: maximum LOW level = 0.3 V
DD
, minimum HIGH level = 0.7 V
DD
. To comply with 5 V and 3.3 V logic,
the maximal LOW level is defined by V
DD
= 5 V and the minimum HIGH level by V
DD
=3.3V.
[5] For optimum channel separation, supply voltage ripple rejection and common mode rejection ratio, a resistor should
be in series with the ACGND capacitor.
12. Performance diagrams
Z
i
input impedance T
amb
= 40 C to +105 C507095k
T
amb
= 0 C to 105 C607095k
mute
mute attenuation V
o
/ V
o(mute)
; V
i
=50mV 80 92 - dB
V
o(mute)(RMS)
RMS mute output voltage V
i
= 1 V (RMS);
filter 20 Hz to 22 kHz
-25-V
B
p
power bandwidth 1 dB - 20 to
20000
-Hz
Table 17. Characteristics
…continued
Refer to Figure 29 at V
P
=V
P1
=V
P2
= 14.4 V; R
L
=4
; f = 1 kHz; R
S
=0
; normal mode; unless otherwise specified.
Tested at T
amb
=25
C; guaranteed for T
amb
=
40
C to +105
C.
Symbol Parameter Conditions Min Typ Max Unit
V
P
=14.4V; R
L
=4.
(1) f = 10 kHz.
(2) f = 1 kHz.
(3) f = 100 Hz.
Fig 17. Total harmonic distortion as a function of output power
001aad121
10
−1
10
−2
10
1
10
2
THD
(%)
10
−3
P
o
(W)
10
−2
10
2
1010
−1
1
(1)
(2)
(3)
