TDA8594SD/N1S,112 Datasheet TDA8594J/N1S, TDA8594SD/N1S,112, TDA8594J/N1 | P19-P21

Product data sheet Rev. 5 — 11 June 2013 19 of 49

NXP Semiconductors

TDA8594

C-bus controlled 4  50 W power amplifier

8. I

C-bus specification

Table 7. TDA8594 hardware address select

Pin ADSEL A6 A5 A4 A3 A2 A1 A0 R/W

Open 11011000=write to TDA8594

1 = read from TDA8594

51 k to ground11011010=write to TDA8594

1 = read from TDA8594

10 k to ground11011110=write to TDA8594

1 = read from TDA8594

Ground no I

C-bus; legacy mode

Fig 14. Definition of START and STOP conditions

Fig 15. Bit transfer

mba608

SDA

SCL

STOP condition

START condition

mba607

data line

stable;

data valid

change

of data

allowed

SDA

SCL

Product data sheet Rev. 5 — 11 June 2013 20 of 49

NXP Semiconductors

TDA8594

C-bus controlled 4  50 W power amplifier

8.1 Instruction bytes

C-bus mode:

• If bit R/W = 0, the TDA8594 expects three instruction bytes; IB1, IB2 and IB3

• After a power-on reset, all instruction bits are set to zero.

Legacy mode:

• All bits equal to zero define the setting, with the exception of bit IB1[D0] which is

ignored; see Table 8

Fig 16. I

C-bus read and write modes

001aac649

ACK

MSB − 1 MSB − 1

MSB

MSB LSB + 1 LSB

LSB + 1

12 78912 789

: generated by master (microcontroller)

To stop the transfer, after the last acknowledge (A)

a STOP condition (P) must be generated

To stop the transfer, the last byte must not be acknowledged

and a STOP condition (P) must be generated

: generated by slave

: START

: STOP

: acknowledge

: read / write

R/W

: not acknowledgeNA

SCL

SDA

SCL

SDA

ACK

MSB MSB − 1 MSB MSB − 1 LSB + 1 LSBLSB + 1

ACK

S A

NA P

ADDRESS

WRITE DATA

READ DATA

ADDRESS

C-BUS WRITE

C-BUS READ

Table 8. Instruction byte IB1

Bit Description

D7 don’t care

D6 channel 3 clip information on DIAG or STB pin

0 = clip information on DIAG pin

1 = clip information on STB pin

D5 channel 1 clip information on DIAG or STB pin

0 = clip information on DIAG pin

1 = clip information on STB pin

Product data sheet Rev. 5 — 11 June 2013 21 of 49

NXP Semiconductors

TDA8594

C-bus controlled 4  50 W power amplifier

D4 channel 4 clip information on DIAG or STB pin

0 = clip information on DIAG pin

1 = clip information on STB pin

D3 channel 2 clip information on DIAG or STB pin

0 = clip information on DIAG pin

1 = clip information on STB pin

D2 AC load detection enable

0 = AC load detection disabled

1 = AC load detection enabled; DBx[D4] bits not available for DC load detection

D1 DC load detection enable

0 = DC load detection disabled

1 = DC load detection enabled

D0 amplifier start enable

0 = amplifier not enabled, DIAG pin will remain LOW

1 = amplifier will start up, power-on occurred (DB2[D7] will be reset) and DIAG

pin will be released

Table 9. Instruction byte IB2

Bit Description

D7 and D6 clip detection level

00 = clip detection level 2 %

01 = clip detection level 5 %

10 = clip detection level 10 %

11 = clip detection level disabled

D5 temperature information on DIAG pin

0 = temperature information on DIAG pin

1 = no temperature information on DIAG pin

D4 load fault information (shorts, missing current) on DIAG pin

0 = fault information on DIAG pin

1 = no fault information on DIAG pin

D3 low pop (slow start) enable

0 = low pop enabled

1 = low pop disabled

D2 soft mute channel 1 and channel 3 (mute delay 20 ms)

0=no mute

1=mute

D1 soft mute channel 2 and channel 4 (mute delay 20 ms)

0=no mute

1=mute

Table 8. Instruction byte IB1

…continued

Bit Description

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P27 P28-P30 P31-P33 P34-P36 P37-P39 P40-P42 P43-P45 P46-P48 P49-P49

TDA8594SD/N1S,112

Mfr. #:

Buy TDA8594SD/N1S,112

Manufacturer:

NXP Semiconductors

Description:

Audio Amplifiers GEN PURP 75W 45dB

Lifecycle:

New from this manufacturer.

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TDA8594SD/N1S,112

TDA8594SD/N1S,112

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