P89LPC952_954_4 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 04 — 24 July 2008 7 of 69
NXP Semiconductors
P89LPC952/954
8-bit microcontroller with 10-bit ADC
Fig 4. LQFP44 pin configuration
P89LPC952FBD
P89LPC954FBD
P4.1/TRIG
002aab306
1
2
3
4
5
6
7
8
9
10
11
33
32
31
30
29
28
27
26
25
24
23
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
P1.3/INT0/SDA
P1.2/T0/SCL
P1.1/RXD0
P1.0/TXD0
P3.1/XTAL1
P3.0/XTAL2/CLKOUT
V
DD
P5.7
P5.6
P5.5
P5.4
P1.4/INT1
P1.5/RST
P1.6
V
SS
P1.7/AD04
P2.0/AD07
P2.1/AD06
P0.0/CMP2/KBI0/AD05
P0.1/CIN2B/KBI1/AD00
P0.2/CIN2A/KBI2/AD01
P0.3/CIN1B/KBI3/AD02
P0.4/CIN1A/KBI4/AD03
P0.5/CMPREF/KBI5
P0.6/CMP1/KBI6
V
DD
P0.7/T1/KBI7
P2.2/MOSI
P2.3/MISO
P2.4/SS
P2.5/SPICLK
P4.0
P5.3
P5.2
P5.1
P5.0
V
SS
P4.7/TCLK
P4.6
P4.5/TDI
P4.4
P4.3/RXD1
P4.2/TXD1
P89LPC952_954_4 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 04 — 24 July 2008 8 of 69
NXP Semiconductors
P89LPC952/954
8-bit microcontroller with 10-bit ADC
Fig 5. LQFP48 pin configuration
P89LPC954FBD48
V
DD
VREFN
P4.1/TRIG
002aad095
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
13
14
15
16
17
18
19
20
21
22
23
48
47
46
45
44
43
42
41
40
39
38
37
24
P1.3/INT0/SDA
P1.2/T0/SCL
P1.1/RXD0
P1.0/TXD0
P2.7
P3.1/XTAL1
P3.0/XTAL2/CLKOUT
V
DD
P5.7
P5.6
P5.5
P5.4
P5.3
P5.2
P5.1
P5.0
V
SS
P4.7/TCLK
P4.6
P4.5/TDI
P4.4
P4.3/RXD1
P4.2/TXD1
P4.0
P0.4/CIN1A/KBI4/AD03
P0.5/CMPREF/KBI5
P0.6/CMP1/KBI6
VREFP
P0.7/T1/KBI7
P2.2/MOSI
P2.3/MISO
P2.4/SS
P2.5/SPICLK
P2.6
P1.4/INT1
P1.5/RST
P1.6
V
SS
P1.7/AD04
P2.0/AD07
P2.1/AD06
P0.0/CMP2/KBI0/AD05
P0.1/CIN2B/KBI1/AD00
P0.2/CIN2A/KBI2/AD01
P0.3/CIN1B/KBI3/AD02
P89LPC952_954_4 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 04 — 24 July 2008 9 of 69
NXP Semiconductors
P89LPC952/954
8-bit microcontroller with 10-bit ADC
6.2 Pin description
Table 3. Pin description
Symbol Pin Type Description
LQFP48 PLCC44 LQFP44
P0.0 to P0.7 I/O Port 0: Port 0 is an 8-bit I/O port with a user-configurable
output type. During reset Port 0 latches are configured in the
input only mode with the internal pull-up disabled. The
operation of Port 0 pins as inputs and outputs depends upon
the port configuration selected. Each port pin is configured
independently. Refer to
Section 7.13.1 “Port configurations”
and
Table 11 “Static characteristics” for details.
The Keypad Interrupt feature operates with Port 0 pins.
All pins have Schmitt triggered inputs.
Port 0 also provides various special functions as described
below:
P0.0/CMP2/
KBI0/AD05
40 43 37 I/O P0.0 — Port 0 bit 0.
O CMP2 — Comparator 2 output.
I KBI0 — Keyboard input 0.
I AD05 — ADC0 channel 5 analog input.
P0.1/CIN2B/
KBI1/AD00
39 42 36 I/O P0.1 — Port 0 bit 1.
I CIN2B — Comparator 2 positive input B.
I KBI1 — Keyboard input 1.
I AD00 — ADC0 channel 0 analog input.
P0.2/CIN2A/
KBI2/AD01
38 41 35 I/O P0.2 — Port 0 bit 2.
I CIN2A — Comparator 2 positive input A.
I KBI2 — Keyboard input 2.
I AD01 — ADC0 channel 1 analog input.
P0.3/CIN1B/
KBI3/AD02
37 40 34 I/O P0.3 — Port 0 bit 3.
I CIN1B — Comparator 1 positive input B.
I KBI3 — Keyboard input 3.
I AD02 — ADC0 channel 2 analog input.
P0.4/CIN1A/
KBI4/AD03
36 39 33 I/O P0.4 — Port 0 bit 4.
I CIN1A — Comparator 1 positive input A.
I KBI4 — Keyboard input 4.
I AD03 — ADC0 channel 3 analog input.
P0.5/CMPREF/
KBI5
35 38 32 I/O P0.5 — Port 0 bit 5.
I CMPREF — Comparator reference (negative) input.
I KBI5 — Keyboard input 5.

P89LPC952FA,512

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Microcontrollers - MCU 8-bit Microcontrollers - MCU 80C51 8K FL 512B RAM
Lifecycle:
New from this manufacturer.
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