TFA9812_2 © NXP B.V. 2009. All rights reserved.
Preliminary data sheet Rev. 02 — 22 January 2009 13 of 66
NXP Semiconductors
TFA9812
BTL stereo Class-D audio amplifier with I
2
S input
8.3 Power-up/power-down
8.3.1 Power-up
Figure 3 and Table 10 describe the power-up timing while Table 11 shows the pin control
for initiating a power-up reset.
[1] Mute in Legacy mode is controlled by AVOL pin.
Fig 3. Power-up/power-down timing
external
voltage
supplies
POWERUP
pin
I
2
C
available
ENABLE
pin
PWM
outputs
t
wake
t
d(on)
t
d(mute_off)
t
d(soft_mute)
010aaa219
soft mute
setting in
I
2
C mode
AVOL pin
in Legacy
mode
Operating
mode active
Table 10. Power-up/power-down timing
Symbol Parameter Conditions Min Typ Max Unit
t
wake
wake-up
time
I
2
C control - 4 - ms
t
d(on)
turn-on
delay time
- 70 - 135 ms
t
d(mute_off)
mute off
delay time
- - - 128/f
s
s
t
d(soft_mute)
Soft mute
delay time
I
2
C control - - 128/f
s
s
legacy
control
[1]
-15-ms
TFA9812_2 © NXP B.V. 2009. All rights reserved.
Preliminary data sheet Rev. 02 — 22 January 2009 14 of 66
NXP Semiconductors
TFA9812
BTL stereo Class-D audio amplifier with I
2
S input
In I
2
C control mode communication is enabled after 4 ms. The preferred I
2
C settings can
be made within 66 ms before the PLL starts running. Finally, the output stages are
enabled and the audio level is increased via a demute sequence if mute has previously
been disabled.
Remark: In I
2
C mode soft mute is enabled by default. It can be disabled at any time while
I
2
C communication is valid. In order to prevent audio clicks volume control (default setting
is 0 dB) should be set before soft mute is disabled.
Remark: For a proper start-up in I
2
S master mode and I
2
C mode the following sequence
should be followed:
1. The I
2
S master setting should be set and keep the default sample rate setting active.
2. Next, another sample rate setting than the default one should be selected.
3. Finally, when the default sample rate is used the default sample rate setting should be
selected again.
8.3.2 Power-down
Figure 3 includes the power-down timing while Table 11 shows the pin control for enabling
power-down.
Putting the TFA9812 into power-down is equivalent to enabling Sleep mode
(see Section 8.2.2). This mode is entered immediately and no additional clock cycles are
required.
In order to prevent audible clicks, soft mute should be enabled at least T
d(soft_mute)
seconds before enabling Sleep mode.
The specified low current and power conditions in Table 1 are valid within 10 µs after
enabling Sleep mode.
8.4 Digital audio data input
8.4.1 Digital audio data format support
The TFA9812 supports a commonly used range of I
2
S and I
2
S-like digital audio data input
formats. These are listed in Table 12.
Table 11. Power-up/power-down selection
Power-up pin
value
Description
0 Power-down (Sleep mode)
1 Power-up
Table 12. Supported digital audio data formats
BCK frequency Interface format (MSB first) Supported in I
2
C
control mode
Supported in Legacy
control mode
32 f
s
I
2
S up to 16-bit data yes yes
32 f
s
MSB-justified 16-bit data yes yes
32 f
s
LSB-justified 16-bit data yes yes
48 f
s
I
2
S up to 24-bit data yes yes
48 f
s
MSB-justified up to 24-bit data yes yes
TFA9812_2 © NXP B.V. 2009. All rights reserved.
Preliminary data sheet Rev. 02 — 22 January 2009 15 of 66
NXP Semiconductors
TFA9812
BTL stereo Class-D audio amplifier with I
2
S input
Remark: Only MSB-first formats are supported.
48 f
s
LSB-justified 16-bit data yes no
48 f
s
LSB-justified 18-bit data yes no
48 f
s
LSB-justified 20-bit data yes no
48 f
s
LSB-justified 24-bit data yes yes
64 f
s
I
2
S up to 24-bit data yes yes
64 f
s
MSB-justified up to 24-bit data yes yes
64 f
s
LSB-justified 16-bit data yes no
64 f
s
LSB-justified 18-bit data yes no
64 f
s
LSB-justified 20-bit data yes no
64 f
s
LSB-justified 24-bit data yes no
Table 12. Supported digital audio data formats
BCK frequency Interface format (MSB first) Supported in I
2
C
control mode
Supported in Legacy
control mode
Fig 4. Serial interface input and output formats
16
MSB B2 B3 B4 B5 B6
LEFT
LSB-JUSTIFIED FORMAT 20 BITS
WS
BCK
DATA
RIGHT
1518 1720 19 2 1
B19
LSB
16
MSB B2 B3 B4 B5 B6
1518 1720 19 2 1
B19 LSB
MSB MSBB2
2112 3
LEFT
I
2
S-BUS FORMAT
WS
BCK
DATA
RIGHT
3
MSB B2
010aaa458
16
B5 B6 B7 B8 B9 B10
LEFT
LSB-JUSTIFIED FORMAT 24 BITS
WS
BCK
DATA
RIGHT
1518 1720 1922 212324 2 1
B3 B4
MSB
B2
B23
LSB
16
B5 B6 B7 B8 B9 B10
1518 1720 1922 212324 2 1
B3 B4
MSB
B2
B23 LSB
16
MSB
B2
LEFT
LSB-JUSTIFIED FORMAT 16 BITS
WS
BCK
DATA
RIGHT
15 2 1
B15
LSB
16
MSB B2
15 2 1
B15 LSB
16
MSB B2 B3 B4
LEFT
LSB-JUSTIFIED FORMAT 18 BITS
WS
BCK
DATA
RIGHT
1518 17 2 1
MSB B2 B3 B4
B17
LSB
16 1518 17 2 1
B17 LSB
MSB-JUSTIFIED FORMAT
WS
LEFT
RIGHT
321321
MSB B2 MSBLSB LSB MSB B2B2
BCK
DATA

TFA9812HN/N1,518

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC AMP AUDIO 15W STER D 48HVQFN
Lifecycle:
New from this manufacturer.
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