TFA9812_2 © NXP B.V. 2009. All rights reserved.
Preliminary data sheet Rev. 02 — 22 January 2009 37 of 66
NXP Semiconductors
TFA9812
BTL stereo Class-D audio amplifier with I
2
S input
9.5.9 TFA9812 temperature
9.5.10 Miscellaneous status
Table 46. Bit description of register 2Dh: digital-in clock configuration
Bit Symbol Description
9 to 0 TP_THR[9:0] Reduction on the maximum temperature of 125 °C.
The reduction can be calculated by:
reduction INTEGER
(TP_THR[9:0]
2.4552
-----------------------------------
in °C=
Table 47. Register 2Fh: TFA9812 temperature
Bit 15 14 13 12 11 10 9 8
Symbol RSD RSD RSD RSD RSD RSD TEMP9 TEMP8
Default --------
Bit 7 6 5 4 3 2 1 0
Symbol TEMP7 TEMP6 TEMP5 TEMP4 TEMP3 TEMP2 TEMP1 TEMP0
Default --------
Table 48. Bit description of register 2Dh: digital-in clock configuration
Bit Symbol Description
9 to 0 TEMP[9:0] Temperature of the TFA9812, which can be calculated in
°C using: Temp TFA9812 = (1023 TEMP[9:0]) / 2.4552
Table 49. Register 30h: miscellaneous status
Bit 15 14 13 12 11 10 9 8
Symbol RSD RSD RSD RSD RSD RSD RSD RSD
Default --------
Bit 7 6 5 4 3 2 1 0
Symbol RSD OFP UFP UVP1V8 UVP3V3 DIAG LP MUTE
Default --------
Table 50. Bit description of register 30h: miscellaneous status
Bit Symbol Description
6 OFP PLL frequency-over-range indicator:
0 = PLL frequency in supported range
1 = PLL frequency exceeds highest supported
frequency value
5 UFP PLL frequency under-range indicator:
0 = PLL frequency in supported range
1 = PLL frequency below lowest supported frequency
value
4 UVP1V8 Undervoltage detector for pins 4 and 41:
0 = No UVP has been detected
1 = A UVP has been detected since the last read-out of
the register
TFA9812_2 © NXP B.V. 2009. All rights reserved.
Preliminary data sheet Rev. 02 — 22 January 2009 38 of 66
NXP Semiconductors
TFA9812
BTL stereo Class-D audio amplifier with I
2
S input
[1] The diagnostic pin 30 DIAG is flagged when several protection mechanisms have been active, see
Section 8.7.
9.6 Overview of functional control in each control mode
Table 51 shows the control level supported by either I
2
C or Legacy control mode for all
functions described in Section 9. It summarizes the information provided in the detailed
description of each function.
3 UVP3V3 Undervoltage detector for pins 3 and 40:
0 = No UVP has been detected
1 = A UVP has been detected since the last read-out of
the register
2 DIAG Diagnostic pin flagging status
[1]
:
0 = Diagnostic pin has not been flagged low
1 = Diagnostic pin has been flagged low since the last
read-out of the register
1 LP PLL lock protection indicator:
0 = PLL is in locked status
1 = PLL is not in locked status
0 MUTE Soft mute status:
0 = No soft-mute or soft mute/demute in progress
1 = Audio signal muted as result of a soft mute
Table 50. Bit description of register 30h: miscellaneous status
…continued
Bit Symbol Description
Table 51. Functional control support in I
2
C and Legacy control modes
D = fixed control setting, determined by default I
2
C register setting; N = not supported; Y = fully
supported (i.e. all options implemented in the TFA9812).
Control function Reference I
2
C mode Legacy mode
I
2
C register content Section 9 Y N/D
Sleep mode enable
Section 8.2.2 YY
Operating mode enable
Section 8.2.2 YY
3-state mode enable
Section 8.2.2 YY
Master/Slave I
2
S Section 8.2.3 YY
MCLK/BCK master input clock selection
Section 8.2.3 Auto Auto
Digital audio input format selection
Section 8.4 Y Subset
Selection f
s
= 8 kHz to192 kHz Section 8.4.1 YD
[1]
Equalizer enable and configuration Section 8.5.1 YD
[2]
Detailed equalizer settings Section 8.5.1 YN
Digital volume control per channel
Section 8.5.2 YN
Analog volume control (shared for two channels)
Section 8.5.3 NY
De-emphasis for subset of allowed f
s
Section 8.5.3 YN
Soft mute
Section 8.5.3 YY
[3]
Hard mute Section 8.5.3 YN
Polarity switch enable
Section 8.5.4 YN
+24 dB gain boost
Section 8.5.6 YY
TFA9812_2 © NXP B.V. 2009. All rights reserved.
Preliminary data sheet Rev. 02 — 22 January 2009 39 of 66
NXP Semiconductors
TFA9812
BTL stereo Class-D audio amplifier with I
2
S input
[1] 32 kHz, 44.1 kHz and 48 kHz supported
[2] Bypass.
[3] Special Legacy mode implementation.
[4] 10 % clip level.
[5] 400 kHz.
10. Internal circuitry
Clip level control Section 8.5.5 YD
[4]
Output power limit level control Section 8.5.6 YY
PWM signal frequency selection
Section 8.5.7 YD
[5]
Thermal foldback threshold temperature control Section 8.7.1 YN
Table 51. Functional control support in I
2
C and Legacy control modes
…continued
D = fixed control setting, determined by default I
2
C register setting; N = not supported; Y = fully
supported (i.e. all options implemented in the TFA9812).
Control function Reference I
2
C mode Legacy mode
Table 52. Internal circuitry
Pin Symbol Equivalent circuitry
1 XTALIN
32 AVOL
2 XTALOUT
3V
DDA(3V3)
40 V
DDD(3V3)
1, 32
ESD
V
SS1
, V
SS2
, REFA, REFD
Exposed die paddle
010aaa459
STABA
2
V
SS1
, V
SS2
, REFA, REFD,
Exposed die-paddle
010aaa460
ESD
V
SS1
, V
SS2
, REFA, REFD,
Exposed die-paddle
010aaa461
3, 40
ESD

TFA9812HN/N1,518

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC AMP AUDIO 15W STER D 48HVQFN
Lifecycle:
New from this manufacturer.
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