ADC1415S_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 4 — 17 December 2010 7 of 42
NXP Semiconductors
ADC1415S series
Single 14-bit ADC; input buffer; CMOS or LVDS DDR digital outputs
9. Static characteristics
Table 6. Static characteristics
[1]
Symbol Parameter Conditions Min Typ Max Unit
Supplies
V
DDA(5V)
analog supply voltage 5 V 4.75 5.0 5.25 V
V
DDA(3V)
analog supply voltage 3 V 2.85 3.0 3.4 V
V
DDO
output supply voltage CMOS mode 1.65 1.8 3.6 V
LVDS DDR mode 2.85 3.0 3.6 V
I
DDA(5V)
analog supply current 5 V f
clk
=125Msps;
f
i
=70MHz
-46-mA
I
DDA(3V)
analog supply current 3 V f
clk
=125Msps;
f
i
=70MHz
-205-mA
I
DDO
output supply current CMOS mode;
f
clk
=125Msps;
f
i
=70MHz
-14-mA
LVDS DDR mode:
f
clk
=125Msps;
f
i
=70MHz
-43-mA
P power dissipation ADC1415S125;
analog supply only
-840-mW
ADC1415S105;
analog supply only
-770-mW
ADC1415S080;
analog supply only
-635-mW
ADC1415S065;
analog supply only
-580-mW
Power-down mode - 2 - mW
Standby mode - 40 - mW
Clock inputs: pins CLKP and CLKM
LVPECL
V
i(clk)dif
differential clock input voltage peak-to-peak 1.6 - V
SINE wave
V
i(clk)dif
differential clock input voltage peak - ±3.0 - V
LVCMOS
V
IL
LOW-level input voltage - - 0.3V
DDA(3V)
V
V
IH
HIGH-level input voltage 0.7V
DDA(3V)
--V
Logic inputs: pins PWD and OE
V
IL
LOW-level input voltage 0 - 0.8 V
V
IH
HIGH-level input voltage 2 - V
DDA(3V)
V
I
IL
LOW-level input current - 55 - μA
I
IH
HIGH-level input current - 65 - μA
Serial peripheral interface: pins CS
, SDIO/ODS, SCLK/DFS
V
IL
LOW-level input voltage 0 - 0.3V
DDA(3V)
V
V
IH
HIGH-level input voltage 0.7V
DDA(3V)
-V
DDA(3V)
V
ADC1415S_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 4 — 17 December 2010 8 of 42
NXP Semiconductors
ADC1415S series
Single 14-bit ADC; input buffer; CMOS or LVDS DDR digital outputs
I
IL
LOW-level input current 10 - +10 μA
I
IH
HIGH-level input current 50 - +50 μA
C
I
input capacitance - 4 - pF
Digital outputs, CMOS mode: pins D13 to D0, OTR, DAV
Output levels, V
DDO
=3V
V
OL
LOW-level output voltage OGND - 0.2V
DDO
V
V
OH
HIGH-level output voltage 0.8V
DDO
-V
DDO
V
C
O
output capacitance high impedance;
OE
=HIGH
-3-pF
Output levels, V
DDO
=1.8V
V
OL
LOW-level output voltage OGND - 0.2V
DDO
V
V
OH
HIGH-level output voltage 0.8V
DDO
-V
DDO
V
Digital outputs, LVDS mode: pins D12_D13_P to D0_D1_P, D12_D13_M to D0_D1_M, DAVP and DAVM
Output levels, V
DDO
= 3 V only, R
load
=100Ω
V
O(offset)
output offset voltage output buffer current
set to 3.5 mA
-1.2-V
V
O(dif)
differential output voltage output buffer current
set to 3.5 mA
-350-mV
C
O
output capacitance - 3 - pF
Analog inputs: pins INP and INM
I
I
input current 5- +5μA
R
I
input resistance - 550 - Ω
C
I
input capacitance - 1.3 - pF
V
I(cm)
common-mode input voltage V
INP
=V
INM
0.9 1.5 2 V
B
i
input bandwidth - 600 - MHz
V
I(dif)
differential input voltage peak-to-peak 1 - 2 V
Common mode output voltage: pin VCM
V
O(cm)
common-mode output voltage - 0.5V
DDA(3V)
-V
I
O(cm)
common-mode output current - 4 - mA
I/O reference voltage: pin VREF
V
VREF
voltage on pin VREF output - 0.5 to 1 - V
input 0.5 - 1 V
Table 6. Static characteristics
[1]
…continued
Symbol Parameter Conditions Min Typ Max Unit
ADC1415S_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 4 — 17 December 2010 9 of 42
NXP Semiconductors
ADC1415S series
Single 14-bit ADC; input buffer; CMOS or LVDS DDR digital outputs
[1] Typical values measured at V
DDA(3V)
=3V, V
DDO
= 1.8 V, V
DDA(5V)
=5V; T
amb
=25°C and C
L
= 5 pF; minimum and maximum values
are across the full temperature range T
amb
= 40 °C to +85 °C at V
DDA(3V)
=3V, V
DDO
= 1.8 V, V
DDA(5V)
=5V, V
INP
V
INM
= 1 dBFS;
internal reference mode; applied to CMOS and LVDS interface; unless otherwise specified.
Accuracy
INL integral non-linearity 5- +5LSB
DNL differential non-linearity guaranteed no
missing codes
0.95 ±0.5 +0.95 LSB
E
offset
offset error - ±2- mV
E
G
gain error - ±0.5 - %FS
Supply
PSRR power supply rejection ratio 200 mV (p-p) on
V
DDA(3V)
- 54 - dBc
Table 6. Static characteristics
[1]
…continued
Symbol Parameter Conditions Min Typ Max Unit

ADC1415S125/DB,598

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NXP Semiconductors
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BOARD DEMO FOR ADC1415S125
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