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M24C64-FMB6TG

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P44
Revision history M24C64-DF, M24C64-W, M24C64-R, M24C64-F
40/44 Doc ID 16891 Rev 26
29-Jun-2006 7
Document converted to new ST template.
M24C32 and M24C64 products (4.5 to 5.5V supply voltage) removed.
M24C64 and M24C32 products (1.7 to 5.5V supply voltage) added.
Section 2.3: Chip Enable (E2, E1, E0) and Section 2.4: Write Control
(WC) modified, Section 2.6: Supply voltage (VCC) added and replaces
Power On Reset: VCC Lock-Out Write Protect section.
T
A
added, Note 1 updated and T
LEAD
specified for PDIP packages in
Table 6: Absolute maximum ratings.
I
CC0
added, I
CC
voltage conditions changed and I
CC1
specified over the
whole voltage range in Table 24: DC characteristics (M24xxx-W, device
grade 6).
I
CC0
added, I
CC
frequency conditions changed and I
CC1
specified over
the whole voltage range in Table 26: DC characteristics (M24xxx-R -
device grade 6).
t
W
modified in Table 28: AC characteristics.
SO8N package specifications updated (see Figure 16 and Table 2 0).
Device grade 5 added, B and P Process letters added to Ta bl e 2 4:
Ordering information scheme. Small text changes.
03-Jul-2006 8
I
CC1
modified in Table 24: DC characteristics (M24xxx-W, device grade
6).
Note 1 added to Table 27: DC characteristics (M24xxx-F) and table title
modified.
17-Oct-2006 9
UFDFPN8 package specifications updated (see Ta b l e 2 1 ). M24128-BW-
and M24128-BR part numbers added.
Generic part number corrected in Features on page 1.
I
CC0
corrected in Tabl e 2 5 and Tabl e 2 4.
Packages are ECOPACK® compliant.
27-Apr-2007 10
Available packages and temperature ranges by product specified in
Tabl e 2 2, Ta bl e 24 and Ta b l e 2 5 .
Notes modified below Table 23: Input parameters.
V
IH
max modified in DC characteristics tables (see Ta bl e 2 4, Ta bl e 2 5,
Tabl e 2 6 and Ta b l e 2 7 ).
C process code added to Table 24: Ordering information scheme.
For M24xxx-R (1.8 V to 5.5 V range) products assembled from July 2007
on, t
W
will be 5 ms (see Table 28: AC characteristics.
27-Nov-2007 11
Small text changes. Section 2.5: VSS ground and Section 4.9: ECC
(error correction code) and write cycling added.
V
IL
and V
IH
modified in Table 26: DC characteristics (M24xxx-R - device
grade 6).
JEDEC standard reference updated below Table 6: Absolute maximum
ratings.
Package mechanical data inch values calculated from mm and rounded
to 4 decimal digits (see Section 8: Package mechanical data).
Table 25. Document revision history (continued)
Date Revision Changes
M24C64-DF, M24C64-W, M24C64-R, M24C64-F Revision history
Doc ID 16891 Rev 26 41/44
18-Dec-2007 12
Added Section 2.6.2: Power-up conditions, updated Section 2.6.3:
Device reset, and Section 2.6.4: Power-down conditions in Section 2.6:
Supply voltage (VCC).
Updated Figure 5: I2C Fast mode (fC = 400 kHz): maximum Rbus value
versus bus parasitic capacitance (Cbus).
Replace M24128 and M24C64 by M24128-BFMB6 and M24C64-FMB6,
respectively, in Section 4.9: ECC (error correction code) and write
cycling.
Added temperature grade 6 in Table 21: Operating conditions (M24xxx-
F).
Updated test conditions for I
LO
and V
LO
in Table 24: DC characteristics
(M24xxx-W, device grade 6), Table 25: DC characteristics (M24xxx-W,
device grade 3), and Table 26: DC characteristics (M24xxx-R - device
grade 6).
Test condition updated for I
LO
, and V
IH
and V
IL
differentiate for 1.8 V ≤
V
CC
< 2.5 V and 2.5 V ≤ V
CC
< 5.5 V in Table 27: DC characteristics
(M24xxx-F).
Updated Table 28: AC characteristics, and Table 17: AC characteristics
(M24xxx-F).
Updated Figure 14: AC waveforms.
Added M24128-BF in Table 25: Available M24C32 products (package,
voltage range, temperature grade).
Process B removed fromTable 24: Ordering information scheme.
30-May-2008 13
Small text changes.
C Process option and Blank Plating technology option removed from
Table 24: Ordering information scheme.
15-Jul-2008 14
WLCSP package added (see Figure 3: WLCSP connections (top view,
marking side, with balls on the underside) and Section 8: Package
mechanical data). Section 4.9: ECC (error correction code) and write
cycling updated.
16-Sep-2008 15
I
OL
added to Table 6: Absolute maximum ratings.
Table 24: Available M24C32 products (package, voltage range,
temperature grade) and Table 25: Available M24C32 products (package,
voltage range, temperature grade) updated.
05-Jan-2009 16
I2C modes supported specified in Features on page 1.
Note removed from Table 27: DC characteristics (M24xxx-F). Small text
changes.
Table 25. Document revision history (continued)
Date Revision Changes
Revision history M24C64-DF, M24C64-W, M24C64-R, M24C64-F
42/44 Doc ID 16891 Rev 26
10-Dec-2009 17
32 and 128 Kbit densities removed.
ECOPACK status of packages specified on page 1 and in Ta bl e 2 4 :
Ordering information scheme.
Section 2.6.2: Power-up conditions updated.
Figure 5: I2C Fast mode (fC = 400 kHz): maximum Rbus value versus
bus parasitic capacitance (Cbus) updated. ECC section removed.
t
NS
modified in Table 23: Input parameters.
I
CC1
and V
IH
updated in Table 24: DC characteristics (M24xxx-W, device
grade 6), Table 25: DC characteristics (M24xxx-W, device grade 3),
Table 26: DC characteristics (M24xxx-R - device grade 6) and Tab l e 2 7 :
DC characteristics (M24xxx-F). Note added to Table 26: DC
characteristics (M24xxx-R - device grade 6).
Table 28: AC characteristics modified.
Figure 14: AC waveforms modified.
Note added below Figure 18: UFDFPN8 (MLP8) – 8-lead ultra thin fine
pitch dual flat package no lead 2 × 3mm, package outline.
Small text changes.
05-Feb-2010 18 Number of bytes changed for Page Write in Table 5: Operating modes.
15-Sep-2010 19
Updated tables (process letter K) under Section 6:
– Ta bl e 6 : ESD HBM passes 3000 V
Updated tables (process letter K) under Section 7:
– Ta bl e 1 8 (1MHz AC) inserted,
– Ta bl e 1 7 , Tabl e 1 8: Tclqv(min) = 100 ns
– Ta bl e 1 7 , Tabl e 1 8: tNS = 80 ns
16-Nov-2010 20
Added M24C64-DF device.
Updated Features, Section 1: Description, Section 4: Device operation.
Changed title of Figure 2: 8-pin package connections.
Updated Table 10: AC test measurement conditions.
Replaced Figure 18: UFDFPN8 (MLP8) – 8-lead ultra thin fine pitch dual
flat package no lead 2 × 3mm, package outline and Table 21: UFDFPN8
(MLP8) – 8-lead ultra thin fine pitch dual flat package no lead 2 × 3mm,
data.
Added Table 29: M24C32-D product (package, voltage range,
temperature grade).
08-Dec-2010 21
Added WLCSP in Features and Figure 4: WLCSP connections (top
view).
Updated Table 22: UFDFPN8 (MLP8) 8-lead ultra thin fine pitch dual flat
package no lead 2 x 3 mm, data.
Updated Table 26: Available M24C32 products (package, voltage range,
temperature grade) and Table 29: M24C32-D product (package, voltage
range, temperature grade).
14-Mar-2011 22
Updated information concerning E2, E1, E0 for the WLCSP package:
– note under Figure 3: WLCSP connections (top view)
– comment under Figure 4: Device select code
– note
(3)
under Table 2: Device select code
Table 25. Document revision history (continued)
Date Revision Changes
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P44

M24C64-FMB6TG

Mfr. #:
Buy M24C64-FMB6TG
Manufacturer:
STMicroelectronics
Description:
EEPROM 128 Kbit 64 Kbit 1.7 V to 5.5 V
Lifecycle:
New from this manufacturer.
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