AR0330CM
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2
ORDERING INFORMATION
Table 2. AVAILABLE PART NUMBERS
Part Number Product Description Orderable Product Attribute Description
AR0330CM1C00SHAA0−DP 3 MP 1/3″ CIS Dry Pack with Protective Film
AR0330CM1C00SHAA0−DR 3 MP 1/3″ CIS Dry Pack without Protective Film
AR0330CM1C00SHAA0−TP 3 MP 1/3″ CIS Tape & Reel with Protective Film
AR0330CM1C00SHKA0−CP 3 MP 1/3″ CIS Chip Tray with Protective Film
AR0330CM1C00SHKA0−CR 3 MP 1/3″ CIS Chip Tray without Protective Film
AR0330CM1C12SHAA0−DP 3 MP 1/3″ CIS Dry Pack with Protective Film
AR0330CM1C12SHAA0−DR 3 MP 1/3″ CIS Dry Pack without Protective Film
AR0330CM1C12SHKA0−CP 3 MP 1/3″ CIS Chip Tray with Protective Film
AR0330CM1C12SHKA0−CR 3 MP 1/3″ CIS Chip Tray without Protective Film
AR0330CM1C21SHKA0−CP 3 MP 1/3″ CIS Chip Tray with Protective Film
AR0330CM1C21SHKA0−CR 3 MP 1/3″ CIS Chip Tray without Protective Film
GENERAL DESCRIPTION
The AR0330 can be operated in its default mode or
programmed for frame size, exposure, gain, and other
parameters. The default mode output is a 2304 × 1296 image
at 60 frames per second (fps). The sensor outputs 10- or
12-bit raw data, using either the parallel or serial (HiSPi,
MIPI) output ports.
FUNCTIONAL OVERVIEW
The AR0330 is a progressive-scan sensor that generates
a stream of pixel data at a constant frame rate. It uses an
on-chip, phase-locked loop (PLL) that can generate all
internal clocks from a single master input clock running
between 6 and 27 MHz. The maximum output pixel rate is
196 Mp/s using a 4-lane HiSPi or MIPI serial interface and
98 Mp/s using the parallel interface.
Figure 1. Block Diagram
Ext
Clock
Two-wire
Serial I/F
PLL
Timing
and
Control
Registers
Analog Core
Row Drivers
Pixel
Array
Column
Amplifiers
ADC
12-bit
12-bit
12-bit
Digital Core
Row Noise Correction
Black Level Correction
Digital Gain
Data Pedestal
Test Pattern
Generator
Output Data-Path
Compression (Optional)
12-bit 10- or 12-bit
8-,
10-
or 12-bit
Parallel I/O:
PIXCLK, FV,
LV, D
OUT
[11:0]
MIPI I/O:
CLK P/N,
DATA[11:0] P/N
HiSPi I/O:
SLVS C P/N,
SLVS[3:0] P/N
User interaction with the sensor is through the two-wire
serial bus, which communicates with the array control,
analog signal chain, and digital signal chain. The core of the
sensor is a 3.4 Mp active-pixel sensor array. The timing and
control circuitry sequences through the rows of the array,
resetting and then reading each row in turn. In the time
interval between resetting a row and reading that row, the
pixels in the row integrate incident light. The exposure is
controlled by varying the time interval between reset and
readout. Once a row has been read, the signal from the
column is amplified in a column amplifier and then digitized
in an analog-to-digital converter (ADC). The output from
the ADC is a 12-bit value for each pixel in the array.
The ADC output passes through a digital processing signal
chain (which provides further data path corrections and
applies digital gain).
