Status Register Content Memory Content
TB Bit BP3 Bit BP2 Bit BP1 Bit BP0 Bit Protected Area Unprotected Area
0 0 1 1 0 Sectors (224 to 255) Sectors (0 to 223)
0 0 1 1 1 Sectors (192 to 255) Sectors (0 to 191)
0 1 0 0 0 Sectors (128 to 255) Sectors (0 to 127)
0 1 0 0 1 All sectors None
0 1 0 1 0 All sectors None
0 1 0 1 1 All sectors None
0 1 1 0 0 All sectors None
0 1 1 0 1 All sectors None
0 1 1 1 0 All sectors None
0 1 1 1 1 All sectors None
1.6.1.1.8. Block Protection Bits in EPCQ128 when TB Bit is Set to 1
Table 22. Block Protection Bits in EPCQ128 when TB Bit is Set to 1
Status Register Content Memory Content
TB Bit BP3 Bit BP2 Bit BP1 Bit BP0 Bit Protected Area Unprotected Area
1 0 0 0 0 None All sectors
1 0 0 0 1 Sector 0 Sectors (1 to 255)
1 0 0 1 0 Sectors (0 to 1) Sectors (2 to 255)
1 0 0 1 1 Sectors (0 to 3) Sectors (4 to 255)
1 0 1 0 0 Sectors (0 to 7) Sectors (8 to 255)
1 0 1 0 1 Sectors (0 to 15) Sectors (16 to 255)
1 0 1 1 0 Sectors (0 to 31) Sectors (32 to 255)
1 0 1 1 1 Sectors (0 to 63) Sectors (64 to 255)
1 1 0 0 0 Sectors (0 to 127) Sectors (128 to 255)
1 1 0 0 1 All sectors None
1 1 0 1 0 All sectors None
1 1 0 1 1 All sectors None
1 1 1 0 0 All sectors None
1 1 1 0 1 All sectors None
1 1 1 1 0 All sectors None
1 1 1 1 1 All sectors None
1. Quad-Serial Configuration (EPCQ) Devices Datasheet
CF52012 | 2018.06.01
Quad-Serial Configuration (EPCQ) Devices Datasheet
22
1.6.1.1.9. Block Protection Bits in EPCQ256 when TB Bit is Set to 0
Table 23. Block Protection Bits in EPCQ256 when TB Bit is Set to 0
Status Register Content Memory Content
TB Bit BP3 Bit BP2 Bit BP1 Bit BP0 Bit Protected Area Unprotected Area
0 0 0 0 0 None All sectors
0 0 0 0 1 Sector 511 Sectors (0 to 510)
0 0 0 1 0 Sectors (510 to 511) Sectors (0 to 509)
0 0 0 1 1 Sectors (508 to 511) Sectors (0 to 507)
0 0 1 0 0 Sectors (504 to 511) Sectors (0 to 503)
0 0 1 0 1 Sectors (496 to 511) Sectors (0 to 495)
0 0 1 1 0 Sectors (480 to 511) Sectors (0 to 479)
0 0 1 1 1 Sectors (448 to 511) Sectors (0 to 447)
0 1 0 0 0 Sectors (384 to 511) Sectors (0 to 383)
0 1 0 0 1 Sectors (256 to 511) Sectors (0 to 255)
0 1 0 1 0 All sectors None
0 1 0 1 1 All sectors None
0 1 1 0 0 All sectors None
0 1 1 0 1 All sectors None
0 1 1 1 0 All sectors None
0 1 1 1 1 All sectors None
1.6.1.1.10. Block Protection Bits in EPCQ256 when TB Bit is Set to 1
Table 24. Block Protection Bits in EPCQ256 when TB Bit is Set to 1
Status Register Content Memory Content
TB Bit BP3 Bit BP2 Bit BP1 Bit BP0 Bit Protected Area Unprotected Area
1 0 0 0 0 None All sectors
1 0 0 0 1 Sector 0 Sectors (1 to 511)
1 0 0 1 0 Sectors (0 to 1) Sectors (2 to 511)
1 0 0 1 1 Sectors (0 to 3) Sectors (4 to 511)
1 0 1 0 0 Sectors (0 to 7) Sectors (8 to 511)
1 0 1 0 1 Sectors (0 to 15) Sectors (16 to 511)
1 0 1 1 0 Sectors (0 to 31) Sectors (32 to 511)
1 0 1 1 1 Sectors (0 to 63) Sectors (64 to 511)
1 1 0 0 0 Sectors (0 to 127) Sectors (128 to 511)
1 1 0 0 1 Sectors (0 to 255) Sectors (256 to 511)
1 1 0 1 0 All sectors None
1 1 0 1 1 All sectors None
continued...
1. Quad-Serial Configuration (EPCQ) Devices Datasheet
CF52012 | 2018.06.01
Quad-Serial Configuration (EPCQ) Devices Datasheet
23
Status Register Content Memory Content
TB Bit BP3 Bit BP2 Bit BP1 Bit BP0 Bit Protected Area Unprotected Area
1 1 1 0 0 All sectors None
1 1 1 0 1 All sectors None
1 1 1 1 0 All sectors None
1 1 1 1 1 All sectors None
1.6.1.1.11. Block Protection Bits in EPCQ512/A when TB is Set to 0
Table 25. Block Protection Bits in EPCQ512/A when TB Bit is Set to 0
Status Register Content Memory Content
TB Bit BP3 Bit BP2 Bit BP1 Bit BP0 Bit Protected Area Unprotected Area
0 0 0 0 0 None All sectors
0 0 0 0 1 Sector 1023 Sectors (0 to 1022)
0 0 0 1 0 Sectors (1022 to 1023) Sectors (0 to 1021)
0 0 0 1 1 Sectors (1020 to 1023) Sectors (0 to 1019)
0 0 1 0 0 Sectors (1016 to 1023) Sectors (0 to 1015)
0 0 1 0 1 Sectors (1008 to 1023) Sectors (0 to 1007)
0 0 1 1 0 Sectors (992 to 1023) Sectors (0 to 991)
0 0 1 1 1 Sectors (960 to 1023) Sectors (0 to 959)
0 1 0 0 0 Sectors (896 to 1023) Sectors (0 to 895)
0 1 0 0 1 Sectors (768 to 1023) Sectors (0 to 767)
0 1 0 1 0 Sectors (512 to 1023) Sectors (0 to 511)
0 1 0 1 1 All sectors None
0 1 1 0 0 All sectors None
0 1 1 0 1 All sectors None
0 1 1 1 0 All sectors None
0 1 1 1 1 All sectors None
1.6.1.1.12. Block Protection Bits in EPCQ512/A when TB is Set to 1
Table 26. Block Protection Bits in EPCQ512/A when TB Bit is Set to 1
Status Register Content Memory Content
TB Bit BP3 Bit BP2 Bit BP1 Bit BP0 Bit Protected Area Unprotected Area
1 0 0 0 0 None All sectors
1 0 0 0 1 Sector 0 Sectors (1 to 1023)
1 0 0 1 0 Sectors (0 to 1) Sectors (2 to 1023)
1 0 0 1 1 Sectors (0 to 3) Sectors (4 to 1023)
1 0 1 0 0 Sectors (0 to 7) Sectors (8 to 1023)
continued...
1. Quad-Serial Configuration (EPCQ) Devices Datasheet
CF52012 | 2018.06.01
Quad-Serial Configuration (EPCQ) Devices Datasheet
24

EPCQ256SI16N

Mfr. #:
Manufacturer:
Intel / Altera
Description:
FPGA - Configuration Memory IC - Ser. Config Mem Flash 256Mb 50 MHz
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union