GS1531 Data Sheet
30573 - 7 February 2008 28 of 50
4.5 Data-Through Mode
The GS1531 may be configured to operate as a simple parallel-to-serial converter.
In this mode, the device presents data to the output buffer without performing any
scrambling or encoding.
Data-through mode is enabled only when both the SMPTE_BYPASS
and
DVB_ASI pins are set LOW.
4.6 Additional Processing Functions
The GS1531 contains an additional data processing block which is available in
SMPTE mode only, see SMPTE Mode on page 25.
4.6.1 Input Data Blank
The video input data may be 'blanked' by the GS1531. In this mode, all input video
data except TRS words are set to the appropriate blanking levels by the device.
Both the horizontal and vertical ancillary data spaces will also be set to blanking
levels.
This function is enabled by setting the BLANK
pin LOW.
4.6.2 Automatic Video Standard Detection
The GS1531 can detect the input video standard by using the timing parameters
extracted from the received TRS ID words or supplied H, V, and F timing signals,
see Internal Flywheel on page 25. This information is presented to the host
interface via the VIDEO_STANDARD register (Table 4-2).
Total samples per line, active samples per line, total lines per field/frame and active
lines per field/frame are also calculated and presented to the host interface via the
RASTER_STRUCTURE registers (Table 4-3). These line and sample count
registers are updated once per frame at the end of line 12. This is in addition to the
information contained in the VIDEO_STANDARD register.
After device reset, the four RASTER_STRUCTURE registers default to zero.
Table 4-2: Host Interface Description for Video Standard Register
Register Name Bit Name Description R/W Default
VIDEO_STANDARD
Address: 004h
15 Not Used.
14-10 VD_STD[4:0] Video Data Standard (see Table 4-4). R 0
9 INT_PROG
Interlace/Progressive: Set LOW if detected video
standard is PROGRESSIVE and is set HIGH if it is
INTERLACED.
R0
8 STD_LOCK Standard Lock: Set HIGH when flywheel has
achieved full synchronization.
R0
7-0 Not Used.
GS1531 Data Sheet
30573 - 7 February 2008 29 of 50
4.6.2.1 Video Standard Indication
The video standard codes reported in the VD_STD[4:0] bits of the
VIDEO_STANDARD register represent the SMPTE standards as shown in
Table 4-4.
In addition to the 5-bit video standard code word, the VIDEO_STANDARD register
also contains two status bits. The STD_LOCK bit will be set HIGH whenever the
flywheel has achieved full synchronization. The INT_PROG bit will be set LOW if
the detected video standard is progressive and HIGH if the detected video
standard is interlaced.
The VD_STD[4:0], STD_LOCK and INT_PROG
bits of the VIDEO_STANDARD
register will default to zero after device reset. The VD_STD[4:0] and INT_PROG
bits will also default to zero if the SMPTE_BYPASS
pin is asserted LOW or if the
LOCKED output is LOW. The STD_LOCK bit will retain its previous value if the
PCLK is removed.
Table 4-3: Host Interface Description for Raster Structure Registers
Register Name Bit Name Description R/W Default
RASTER_STRUCTURE1
Address: 00Eh
15-12 Not Used.
11-0 RASTER_STRUCTURE_1[11:0] Words Per Active Line R 0
RASTER_STRUCTURE2
Address: 00Fh
15-13 Not Used.
12-0 RASTER_STRUCTURE_2[12:0] Words Per Total Line. R 0
RASTER_STRUCTURE3
Address: 010h
15-11 Not Used.
10-0 RASTER_STRUCTURE_3[10:0] Total Lines Per Frame R 0
RASTER_STRUCTURE4
Address: 011h
15-11 Not Used.
10-0 RASTER_STRUCTURE_4[10:0] Active Lines Per Field R 0
Table 4-4: Supported Video Standards
VD_STD[4:0] SMPTE
Standard
Video Format Length of
HANC
Length of
Active Video
Total
Samples
SMPTE352M
Lines
00h 296M (HD) 1280x720/60 (1:1) 358 1280 1650 10
01h 296M (HD) 1280x720/60 (1:1) - EM 198 1440 1650 10
02h 296M (HD) 1280x720/30 (1:1) 2008 1280 3300 10
03h 296M (HD) 1280x720/30 (1:1) - EM 408 2880 3300 10
04h 296M (HD) 1280x720/50 (1:1) 688 1280 1980 10
05h 296M (HD) 1280x720/50 (1:1) - EM 240 1728 1980 10
06h 296M (HD) 1280x720/25 (1:1) 2668 1280 3960 10
07h 296M (HD) 1280x720/25 (1:1) - EM 492 3456 3960 10
GS1531 Data Sheet
30573 - 7 February 2008 30 of 50
4.6.3 Packet Generation and Insertion
In addition to input data blanking and automatic video standards detection, the
GS1531 may also calculate, assemble and insert into the data stream various
types of ancillary data packets and TRS ID words.
08h 296M (HD) 1280x720/24 (1:1) 2833 1280 4125 10
09h 296M (HD) 1280x720/24 (1:1) - EM 513 3600 4125 10
0Ah 274M (HD) 1920x1080/60 (2:1) or
1920x1080/30 (PsF)
268 1920 2200 10, 572
0Bh 274M (HD) 1920x1080/30 (1:1) 268 1920 2200 18
0Ch 274M (HD) 1920x1080/50 (2:1) or
1920x1080/25 (PsF)
708 1920 2640 10, 572
0Dh 274M (HD) 1920x1080/25 (1:1) 708 1920 2640 18
0Eh 274M (HD) 1920x1080/25 (1:1) - EM 324 2304 2640 18
0Fh 274M (HD) 1920x1080/25 (PsF) - EM 324 2304 2640 10, 572
10h 274M (HD) 1920x1080/24 (1:1) 818 1920 2750 18
11h 274M (HD) 1920x1080/24 (PsF) 818 1920 2750 10, 572
12h 274M (HD) 1920x1080/24 (1:1) - EM 338 2400 2750 18
13h 274M (HD) 1920x1080/24 (PsF) - EM 338 2400 2750 10, 572
14h 295M (HD) 1920x1080/50 (2:1) 444 1920 2376 10, 572
15h 260M (HD) 1920x1035/60 (2:1) 268 1920 2200 10, 572
16h 125M (SD) 1440x487/60 (2:1)
(Or dual link progressive)
268 1440 1716 10, 276
17h 125M (SD) 1440x507/60 (2:1) 268 1440 1716 10, 276
19h 125M (SD) 525-line 487 generic 1716 10, 276
1Bh 125M (SD) 525-line 507 generic 1716 10, 276
18h ITU-R BT.656
(SD)
1440x576/50 (2:1)
(Or dual link progressive)
280 1440 1728 9, 322
1Ah ITU-R BT.656
(SD)
625-line generic (EM) 1728 9, 322
1Dh Unknown HD
1Eh Unknown SD
1Ch, 1Fh Reserved
NOTE: Though the GS1531 will work correctly on and serialize both 59.94Hz and 60Hz formats, it will not distinguish between them.
Table 4-4: Supported Video Standards (Continued)
VD_STD[4:0] SMPTE
Standard
Video Format Length of
HANC
Length of
Active Video
Total
Samples
SMPTE352M
Lines

GS1531-CBE2

Mfr. #:
Manufacturer:
Semtech
Description:
Video ICs BGA-100 Pin
Lifecycle:
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