OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

LPC1225FBD48/321,1

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P61
LPC122X All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 26 August 2011 43 of 61
NXP Semiconductors
LPC122x
32-bit ARM Cortex-M0 microcontroller
(1) Example of an actual transfer curve.
(2) The ideal transfer curve.
(3) Differential linearity error (E
D
).
(4) Integral non-linearity (E
L(adj)
).
(5) Center of a step of the actual transfer curve.
Fig 19. ADC characteristics
002aae787
1023
1022
1021
1020
1019
(2)
(1)
10241018 1019 1020 1021 1022 1023
7123456
7
6
5
4
3
2
1
0
1018
(5)
(4)
(3)
1 LSB
(ideal)
code
out
V
DD(3V3)
− V
SS
1024
offset
error
E
O
gain
error
E
G
offset error
E
O
V
IA
(LSB
ideal
)
1 LSB =
LPC122X All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 26 August 2011 44 of 61
NXP Semiconductors
LPC122x
32-bit ARM Cortex-M0 microcontroller
10.5 BOD static characteristics
[1] Interrupt levels are selected by writing the level value to the BOD control register BODCTRL, see LPC122x
user manual.
Table 10. BOD static characteristics
[1]
T
amb
=25
C.
Symbol Parameter Conditions Min Typ Max Unit
V
th
threshold voltage interrupt level 1
assertion - 2.25 - V
de-assertion - 2.39 - V
interrupt level 2
assertion - 2.54 - V
de-assertion - 2.67 - V
interrupt level 3
assertion - 2.83 - V
de-assertion - 2.93 - V
reset level 1
assertion - 2.04 - V
de-assertion - 2.18 - V
reset level 2
assertion - 2.34 - V
de-assertion - 2.47 - V
reset level 3
assertion - 2.62 - V
de-assertion - 2.76 - V
LPC122X All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 26 August 2011 45 of 61
NXP Semiconductors
LPC122x
32-bit ARM Cortex-M0 microcontroller
11. Dynamic characteristics
11.1 Power-up ramp conditions
[1] See Figure 20.
[2] The wait time specifies the time the power supply must be at levels below 400 mV before ramping up.
Table 11. Power-up characteristics
T
amb
= 40 C to +85 C.
Symbol Parameter Conditions Min Typ Max Unit
t
r
rise time at t = t
1
: 0 < V
I
 400 mV
[1]
0- 500 ms
t
wait
wait time
[1][2]
12 - - s
V
I
input voltage at t = t
1
on pin V
DD
0 - 400 mV
Condition: 0 < V
I
 400 mV at start of power-up (t = t
1
)
Fig 20. Power-up ramp
V
DD
0
400 mV
t
r
t
wait
t = t
1
002aag001
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P61

LPC1225FBD48/321,1

Mfr. #:
Buy LPC1225FBD48/321,1
Manufacturer:
NXP Semiconductors
Description:
ARM Microcontrollers - MCU CORTEX M0 80K FL 8K DMA CRC ADC COMPARTR
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet