LPC122X All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 26 August 2011 49 of 61
NXP Semiconductors
LPC122x
32-bit ARM Cortex-M0 microcontroller
Fig 23. I
2
C-bus pins clock timing
002aaf425
t
f
70 %
30 %
SDA
t
f
70 %
30 %
S
70 %
30 %
70 %
30 %
t
HD;DAT
SCL
1 / f
SCL
70 %
30 %
70 %
30 %
t
VD;DAT
t
HIGH
t
LOW
t
SU;DAT
LPC122X All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 26 August 2011 50 of 61
NXP Semiconductors
LPC122x
32-bit ARM Cortex-M0 microcontroller
12. Application information
12.1 XTAL input
The input voltage to the on-chip oscillators is limited to 1.8 V. If the oscillator is driven by a
clock in slave mode, it is recommended that the input be coupled through a capacitor with
C
i
= 100 pF. To limit the input voltage to the specified range, choose an additional
capacitor to ground C
g
which attenuates the input voltage by a factor C
i
/(C
i
+ C
g
). In slave
mode, a minimum of 200 mV(RMS) is needed.
12.2 XTAL Printed Circuit Board (PCB) layout guidelines
The crystal should be connected on the PCB as close as possible to the oscillator input
and output pins of the chip. Take care that the load capacitors C
x1
,C
x2
, and C
x3
in case of
third overtone crystal usage have a common ground plane. The external components
must also be connected to the ground plain. Loops must be made as small as possible in
order to keep the noise coupled in via the PCB as small as possible. Also parasitics
should stay as small as possible. Values of C
x1
and C
x2
should be chosen smaller
accordingly to the increase in parasitics of the PCB layout.
Fig 24. Slave mode operation of the on-chip oscillator
LPC1xxx
XTALIN
C
i
100 pF
C
g
002aae788
LPC122X All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 26 August 2011 51 of 61
NXP Semiconductors
LPC122x
32-bit ARM Cortex-M0 microcontroller
12.3 ElectroMagnetic Compatibility (EMC)
Radiated emission measurements according to the IEC61967-2 standard using the
TEM-cell method are shown for the LPC1227FBD64/301 in Table 17
.
[1] IEC levels refer to Appendix D in the IEC61967-2 Specification.
Table 17. ElectroMagnetic Compatibility (EMC) for part LPC1227FBD64/301 (TEM-cell
method)
V
DD
= 3.3 V; T
amb
= 25
C.
Parameter Frequency band System clock = Unit
12 MHz 24 MHz 33 MHz
Input clock: IRC (12 MHz)
maximum
peak level
150 kHz - 30 MHz 4.2 3.8 6.4 dBV
30 MHz - 150 MHz 7.3 5.4 9 dBV
150 MHz - 1 GHz 16.4 20.1 23.4 dBV
IEC level
[1]
- MLL-
Input clock: crystal oscillator (12 MHz)
maximum
peak level
150 kHz - 30 MHz 4.8 4 6.6 dBV
30 MHz - 150 MHz 6.9 5.6 10 dBV
150 MHz - 1 GHz 16.3 20.3 22.3 dBV
IEC level
[1]
- MLL-

LPC1225FBD48/321,1

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
ARM Microcontrollers - MCU CORTEX M0 80K FL 8K DMA CRC ADC COMPARTR
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