ADC1610S_SER 4 © IDT 2012. All rights reserved.
Product data sheet Rev. 04 — 2 July 2012 16 of 38
Integrated Device Technology
ADC1610S series
Single 16-bit ADC; CMOS or LVDS DDR digital output
11. Application information
11.1 Device control
The ADC1610S can be controlled via SPI or directly via the I/O pins (Pin control mode).
11.1.1 SPI and Pin control modes
The device enters Pin control mode at power-up, and remains in this mode as long as pin
CS
is held HIGH. In Pin control mode, the SPI pins SDIO, CS and SCLK are used as
static control pins.
SPI control mode is enabled by forcing pin CS
LOW. Once SPI control mode has been
enabled, the device remains in this mode. The transition from Pin control mode to SPI
control mode is illustrated in Figure 15.
When the device enters SPI control mode, the output data standard and data format are
determined by the level on pin SDIO when a transition is triggered by a falling edge on pin
CS
.
11.1.2 Operating mode selection
The active ADC1610S operating mode (Power-up, Power-down or Sleep) can be selected
using bits OP_MODE[1:0] of the Reset and operating mode register (see Table 20) or
using pins PWD and OE
in Pin control mode, as described in Table 10.
11.1.3 Selecting the output data standard
The output data standard (CMOS or LVDS DDR) can be selected via the SPI interface
(see Table 23) or using pin ODS in Pin control mode. LVDS DDR is selected when ODS is
HIGH, otherwise CMOS is selected.
Fig 15. Control mode selection
R/W
SPI control mode
Pin control mode
Data format
offset binary
Data format
two's complement
LVDS DDR
SDIO/ODS
SCLK/DFS
W1 W0 A12
005aaa039
CMOS
CS
Table 10. Operating mode selection pin PWD/OE
Pin PWD/OE Power mode Output high-Z
GND Power-down yes
1/3 V
DDA
Sleep yes
2/3 V
DDA
Power-up yes
V
DDA
Power-up no
