NCN49599
www.onsemi.com
15
GENERAL DESCRIPTION
The NCN49599 is a single−chip half duplex S−FSK
modem with an integrated line driver. It is designed for
hostile communication environments with very low
signal−to−noise ratio (SNR) and high interference. It is
particularly suited for power line carrier (PLC) data
transmission on low−or medium−voltage power lines.
Together with firmware, the device handles of the lower
layers of communication protocols. Firmware solutions are
provided by ON Semiconductor royalty−free for the ON
PL110 protocol. It handles the physical, Media Access
Control (MAC) and Logical Link Control (LLC) layers
on−chip. For more information, refer to the dedicated
software datasheet.
Because the lower layers are handled on−chip, the
NCN49599 provides an innovative architectural split. The
user benefits from a higher level abstraction. Compared to
a low−level interface, the NCN49599 allows faster
development of applications: the user just needs to send the
raw data to the NCN49599 and no longer has to take care of
the details of the transmission over the specific medium. The
latter part easily represents half of the software development
cost.
Figure 13 shows the building blocks of the NCN49599.
Refer to the sections below for a detailed description.
Communication Controller
ARM
Risc
Core
Serial
Comm.
Interface
Local Port
Test
Control
POR
Watchdog
Timer 1 & 2
Interrupt
Control
Program/Data
RAM
Program
ROM
AAF AGC A/D
REF
S−FSK
Demodulator
Receiver(S−FSK Demodulator)
Clock and Control
Zero
crossing
PLL OSC
Clock Generator
& Timer
Transmit Data
& Sine Synthesizer
D/A
LP
Filter
Transmitter (S−FSK Modulator)
RX_DATA
RESB
JTAG I/F
TEST
TX_ENB
TX_OUT
ALC_IN
RX_OUT
RX_IN
REF_OUT
ZC_IN
XIN XOUTVSSA VSSD
NCN49599
FROM
Line Coupler
TO Application
Micro Controller
TxD
RxD
T_REQ
BR0
BR1
CRC
TXD/PRES
5
VDD1V8
IO[9:3]
5
SPI I/F
4
EXT_CLK_E
Flash SPI
SEN
TO
External Flash
Power Amplifier
B A
TSD
Current
Protect
VDDA VDDD
B_OUT1
B_OUT2
EN
A+A−
B+B−
A_OUT
VEE
ILIMRLIM
VCC
Figure 13. Block Diagram of the NCN49599 S−FSK Modem
NCN49599 complies with the CENELEC EN 50065−1
and EN 50065−7 standards. It operates from a single 3.3 V
power supply and is interfaced to the power line by an
external line driver and transformer. An internal PLL is
locked to the mains frequency and is used to synchronize the
data transmission at data rates of 300, 600, 1200, 2400 and
4800 baud for a 50 Hz mains frequency, or 360, 720, 1440,
2880 and 5760 baud for a 60 Hz mains frequency. In both
cases this corresponds to 3, 6, 12 or 24 data bits per half cycle
of the mains period.
S−FSK is a modulation and demodulation technique that
combines some of the advantages of a classical spread
spectrum system (e.g. immunity against narrow band
interferers) with the advantages of the classical FSK system
(low complexity). The transmitter assigns the space
frequency f
S to “data 0” and the mark frequency fM to “data
1”. In contrast to classical FSK, the modulation carriers f
S
and fM used in S−FSK are placed well apart. As interference
and signal attenuation seen at the carrier frequencies are now
less correlated, this results in making their transmission
quality independent from each other. Thus, more robust
communication is possible in interference−prone
environments. The frequency pairs supported by the
NCN49599 are in the range of 9–150 kHz with a typical
separation of 10 kHz.
The NCN49599 incorporates a line driver for
transmission, enabling communication over low−
impedance lines. The line driver is described in detail in the
Power Amplifier section.
The conditioning and conversion of the signal is
performed at the analogue front−end of the circuit. All
further processing of the signal and the handling of the
protocol is fully digital. The digital processing of the signal
is partitioned between hardwired blocks and a
microprocessor block. Where timing is most critical, the
functions are implemented with dedicated hardware. For the
