MT9D115
www.onsemi.com
29
POWER MODES
Power Application Sequence
ON Semiconductor recommends the following sequence
to maintain low power consumption during this process:
CAUTION: Applying power to analog supplies prior to
applying digital and IO supplies or any
other failure to follow the correct power up
sequence may result in high current
consumption and die heating. This can
potentially result in performance and
reliability issues.
1. Ensure that STANDBY is de-asserted and
RESET_BAR is asserted.
2. Apply IO supply (V
DD
_IO) to the image sensor
and wait for the IO supply to be stable.
3. Minimum of 1 ms after IO supply is stable, apply
digital supply to the image sensor and wait.
4. Enable EXTCLK and wait for the EXTCLK signal
to stabilize.
5. De-assert RESET_BAR for a minimum of 10
EXTCLK cycles.
6. After asserting the RESET_BAR, apply analog
supplies (V
AA
, V
AA
_PIX, and V
DD
_PLL) to the
image sensor.
7. After 6000 EXTCLK cycles from the end of
step 6, the image sensor will be in soft standby
state.
8. Communication with the sensor thorough two-wire
serial interface can start 1 EXTCLK after step 7.
In cases where the recommended procedure cannot be
followed, the following condition would affect the sensor’s
power consumption during the power application sequence:
• When analog supplies are applied prior to the digital
and IO supplies, high current consumption on the
analog supplies may be present.
Figure 26. Power Application Sequence Timing
STANDBY
RESET_BAR
V
DD
_IO
V
DD
EXTCLK
V
AA
, V
AA
_PIX,
V
DD
_PLL,
Two-wire
Serial Bus
t
0
t
1
t
3
t
2
t
5
t
6
t
7
t
4
Table 13. POWER APPLICATION SEQUENCE TIMING
Symbol
Parameter Min Typ Max Unit
t
0
Delay from Stable RESET_BAR, STANDBY Signals to VDDIO Power Start 0 – – ns
t
1
Delay from Stable V
DD
_IO to V
DD
Start 1 – – ms
t
2
Delay from Stable V
DD
Power to EXTCLK Start 0 – – ns
t
3
Delay from EXTCLK Start to Stable EXTCLK 1 – – EXTCLK
t
4
RESET_BAR Pulse Width 10 – – EXTCLK
t
5
Delay from RESET_BAR De-asserting to Analog Power Supplies Start 1 – – EXTCLK
t
6
Delay from Analog Power Stable to Soft Standby Mode 6000 – – EXTCLK
t
7
Delay from Soft Standby Mode to First Two-wire Bus Transaction 1 – – EXTCLK
