GS1532 Data Sheet
21498 - 8 February 2007 17 of 51
GSPI
GSPI Input Clock Frequency f
SCLK
–––6.6MHz1–
GSPI Input Clock Duty Cycle DC
SCLK
–405060%6,7–
GSPI Input Data Setup Time – – 0 – – ns 6,7 –
GSPI Input Data Hold Time – – – – 1.43 ns 6,7 –
GSPI Output Data Hold Time – – 2.10 – – ns 6,7 –
GSPI Output Data Delay
Time
– – – – 7.27 ns 6,7 –
TEST LEVELS
1. Production test at room temperature and nominal supply
voltage with guardbands for supply and temperature ranges.
2. Production test at room temperature and nominal supply
voltage with guardbands for supply and temperature ranges
using correlated test.
3. Production test at room temperature and nominal supply
voltage.
4. QA sample test.
5. Calculated result based on Level 1, 2, or 3.
6. Not tested. Guaranteed by design simulations.
7. Not tested. Based on characterization of nominal parts.
8. Not tested. Based on existing design/characterization data of
similar product.
9. Indirect test.
NOTES
1. With 15pF load.
2. Serial Duty Cycle Distortion is defined here to be the difference
between the width of a ‘1’ bit, and the width of a ‘0’ bit.
3. See Device Power Up on page 46, Figure 3-13.
Table 2-2: AC Electrical Characteristics (Continued)
T
A
= 0°C to 70°C, unless otherwise shown
Parameter Symbol Conditions Min Typ Max Units Test
Levels
Notes
