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GS1532-CFE3

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51
GS1532 Data Sheet
21498 - 8 February 2007 34 of 51
3.6.3.1 SMPTE 352M Payload Identifier Insertion
The GS1532 can generate and insert SMPTE 352M payload identifier ancillary
data packets into the data stream, based on information programmed into the host
interface.
When this feature is enabled, the device will automatically generate the ancillary
data preambles, (DID, SDID, DBN, DC), and calculate the checksum. The SMPTE
352M packet will be inserted into the data stream according to the line numbers
programmed in the LINE_352M registers (Table 3-6).
The insertion process will only take place if one or more of the four
VIDEO_FORMAT registers (Table 3-7) have been programmed with non-zero
values. In addition, the GS1532 requires the 352M_INS bit of the
IOPROC_DISABLE register be set LOW.
NOTE 1: For the purpose of determining the line and pixel position for insertion, the
GS1532 will differentiate between PsF and interlaced formats by interrogating bits
14 and 15 of the VIDEO_FORMAT_A register.
The packets will be inserted immediately after the EAV word in SD video streams
and immediately after the line-based CRC word in the Y channel of HD video
streams.
NOTE 2: It is the responsibility of the user to ensure that there is sufficient space
in the horizontal blanking interval for the insertion of the SMPTE 352M packets.
If there are other ancillary data packets present, the SMPTE 352M packet will be
inserted in the first available location in the horizontal ancillary space. Ancillary
data must be adjacent to the EAV in SD streams or to the line based-CRC in HD
streams. Where there is insufficient space available, the 352M packets will not be
inserted.
Table 3-6: Host Interface Description for SMPTE 352M Packet Line Number Insertion Registers
Register Name Bit Name Description R/W Default
LINE_352M_f1
Address: 01Bh
15-11 – Not Used. – –
10-0 LINE_0_352M[10:0] Line number where SMPTE352M packet is inserted
in field 1.
R/W 0
LINE_352M_f2
Address: 01Ch
15-11 – Not Used. – –
10-0 LINE_1_352M[10:0] Line number where SMPTE352M packet is inserted
in field 2.
R/W 0
GS1532 Data Sheet
21498 - 8 February 2007 35 of 51
3.6.3.2 Illegal Code Remapping
If the ILLEGAL_REMAP bit of the IOPROC_DISABLE register is set LOW, the
GS1532 will remap all codes within the active picture between the values of 3FCh
and 3FFh to 3FBh. All codes within the active picture area between the values of
000h and 003h will be remapped to 004h.
In addition, 8-bit TRS and ancillary data preambles will be remapped to 10-bit
values if this feature is enabled.
3.6.3.3 EDH Generation and Insertion
When operating in SD mode, (SD/HD
= HIGH), the GS1532 will generate and
insert complete EDH packets into the data stream. Packet generation and insertion
will only take place if the EDH_CRC_INS bit of the IOPROC_DISABLE register is
set LOW.
The GS1532 will generate all of the required EDH packet data including all ancillary
data preambles, (DID, DBN, DC), reserved code words and checksum. Calculation
of both full field (FF) and active picture (AP) CRC's will be carried out by the device.
SMPTE RP165 specifies the calculation ranges and scope of EDH data for
standard 525 and 625 component digital interfaces. The GS1532 will utilize these
standard ranges by default.
If the received video format does not correspond to 525 or 625 digital component
video standards as determined by the flywheel pixel and line counters, then one of
two schemes for determining the EDH calculation ranges will be employed:
1. Ranges will be based on the line and pixel ranges programmed by the host
interface; or
2. In the absence of user-programmed calculation ranges, ranges will be
determined from the received TRS ID words or supplied H, V, and F timing
signals (see Internal Flywheel on page 27).
Table 3-7: Host Interface Description for SMPTE 352M Payload Identifier Registers
Register Name Bit Name Description R/W Default
VIDEO_FORMAT_B
Address: 00Bh
15-8 SMPTE352M
Byte 4
SMPTE 352M Byte 4 information must be
programmed in this register when 352M_INS =
LOW.
R/W 0
7-0 SMPTE352M
Byte 3
SMPTE 352M Byte 3 information must be
programmed in this register when 352M_INS =
LOW.
R/W 0
VIDEO_FORMAT_A
Address: 00Ah
15-8 SMPTE352M
Byte 2
SMPTE 352M Byte 2 information must be
programmed in this register when 352M_INS =
LOW.
R/W 0
7-0 SMPTE 352M
Byte 1
SMPTE 352M Byte 1 information must be
programmed in this register when 352M_INS =
LOW.
R/W 0
GS1532 Data Sheet
21498 - 8 February 2007 36 of 51
The registers available to the host interface for programming EDH calculation
ranges include active picture and full field line start and end positions for both
fields. Table 3-8 shows the relevant registers, which default to '0' after device reset.
If any or all of these register values are zero, then the EDH CRC calculation ranges
will be determined from the flywheel generated H signal. The first active and full
field pixel will always be the first pixel after the SAV TRS code word. The last active
and full field pixel will always be the last pixel before the start of the EAV TRS code
words.
EDH error flags (EDH, EDA, IDH, IDA and UES) for ancillary data, full field and
active picture will also be inserted. These flags must be programmed into the
EDH_FLAG registers of the device by the application layer (Table 3-9).
NOTE 1: It is the responsibility of the user to ensure that the EDH flag registers are
updated once per field.
The prepared EDH packet will be inserted at the appropriate line of the video
stream according to RP165. The start pixel position of the inserted packet will be
based on the SAV position of that line such that the last byte of the EDH packet
(the checksum) will be placed in the sample immediately preceding the start of the
SAV TRS word.
NOTE 2: It is also the responsibility of the user to ensure that there is sufficient
space in the horizontal blanking interval for the EDH packet to be inserted.
Table 3-8: Host Interface Description for EDH Calculation Range Registers
Register Name Bit Name Description R/W Default
AP_LINE_START_F0
Address: 012h
15-10 – Not Used. – –
9-0 AP_LINE_START_F0[9:0] Field 0 Active Picture start line data used to set
EDH calculation range outside of RP 165
values.
R/W 0
AP_LINE_END_F0
Address: 013h
15-10 – Not Used. – –
9-0 AP_LINE_END_F0[9:0] Field 0 Active Picture end line data used to set
EDH calculation range outside of RP 165
values.
R/W 0
AP_LINE_START_F1
Address: 014h
15-10 – Not Used. – –
9-0 AP_LINE_START_F1[9:0] Field 1 Active Picture start line data used to set
EDH calculation range outside of RP 165
values.
R/W 0
AP_LINE_END_F1
Address: 015h
15-10 – Not Used. – –
9-0 AP_LINE_END_F1[9:0] Field 1 Active Picture end line data used to set
EDH calculation range outside of RP 165
values.
R/W 0
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GS1532-CFE3

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Buy GS1532-CFE3
Manufacturer:
Semtech
Description:
Serializers & Deserializers - Serdes LQFP-80pin
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