21498 - 8 February 2007
22 of 51
GS1532 Data Sheet
2.6.1 Host Interface Map (Read Only Registers)
REGISTER NAME ADDRESS 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1Ch
1Bh
1Ah
19h
18h
17h
16h
15h
14h
13h
12h
RASTER_STRUCTURE4 11h b10b9b8b7b6b5b4b3b2b1b0
RASTER_STRUCTURE3 10h b10b9b8b7b6b5b4b3b2b1b0
RASTER_STRUCTURE2 0Fh b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
RASTER_STRUCTURE1 0Eh b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0Dh
0Ch
0Bh
0Ah
09h
08h
07h
06h
05h
VIDEO_STANDARD 04h VDS-b4 VDS-b3 VDS-b2 VDS-b1 VDS-b0 INT_PROG STD_LOCK
03h
02h
01h
00h
21498 - 8 February 2007
23 of 51
GS1532 Data Sheet
2.6.2 Host Interface Map (R/W Configurable Registers)
REGISTER NAME ADDRESS 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
LINE_352M_f2 1Ch b10b9b8b7b6b5b4b3b2b1b0
LINE_352M_f1 1Bh b10b9b8b7b6b5b4b3b2b1b0
1Ah
FF_LINE_END_F1 19h b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
FF_LINE_START_F1 18h b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
FF_LINE_END_F0 17h b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
FF_LINE_START_F0 16h b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
AP_LINE_END_F1 15h b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
AP_LINE_START_F1 14h b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
AP_LINE_END_F0 13h b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
AP_LINE_START_F0 12h b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
11h
10h
0Fh
0Eh
0Dh
0Ch
VIDEO_FORMAT_B 0Bh VF4-b7 VF4-b6 VF4-b5 VF4-b4 VF4-b3 VF4-b2 VF4-b1 VF4-b0 VF3-b7 VF3-b6 VF3-b5 VF3-b4 VF3-b3 VF3-b2 VF3-b1 VF3-b0
VIDEO_FORMAT_A 0Ah VF2-b7 VF2-b6 VF2-b5 VF2-b4 VF2-b3 VF2-b2 VF2-b1 VF2-b0 VF1-b7 VF1-b6 VF1-b5 VF1-b4 VF1-b3 VF1-b2 VF1-b1 VF1-b0
09h
08h
07h
06h
05h
04h
03h
EDH_FLAG 02h ANC-UES ANC-IDA ANC-IDH ANC-EDA ANC-EDH FF-UES FF-IDA FF-IDH FF-EDA FF-EDH AP-UES AP-IDA AP-IDH AP-EDA AP-EDH
01h
IOPROC_DISABLE 00h H_CONFIG 352M_INS ILLEGAL_
REMAP
EDH_CRC_
INS
ANC_CSUM_
INS
CRC_INS LNUM_ INS TRS_INS
GS1532 Data Sheet
21498 - 8 February 2007 24 of 51
3. Detailed Description
3.1 Functional Overview
The GS1532 is a multi-rate serializer with an integrated cable driver. When used in
conjunction with the external GO1555/GO1525* Voltage Controlled Oscillator, a
transmit solution at 1.485Gb/s, 1.485/1.001Gb/s or 270Mb/s is realized.
The device has three different modes of operation which must be set by the
application layer through external device pins.
When SMPTE mode is enabled, the device will accept 10-bit multiplexed or 20-bit
demultiplexed SMPTE compliant data at both HD and SD signal rates. The
device’s additional processing features are also enabled in this mode.
In DVB-ASI mode, the GS1532 will accept an 8-bit parallel DVB-ASI compliant
transport stream on its upper input bus. The serial output data stream will be
8b/10b encoded and stuffed.
The GS1532’s third mode allows for the serializing of data not conforming to
SMPTE or DVB-ASI streams.
The provided serial digital outputs feature a high impedance mode, output mute on
loss of parallel clock and adjustable signal swing. The output slew rate is
automatically controlled by the SD/HD
setting.
In the digital signal processing core, several data processing functions are
implemented including SMPTE 352M and EDH data packet generation and
insertion, and automatic video standards detection. These features are all enabled
by default, but may be individually disabled via internal registers accessible
through the GSPI host interface.
Finally, the GS1532 contains a JTAG interface for boundary scan test
implementations.
*For new designs use GO1555
3.2 Parallel Data Inputs
Data inputs enter the device on the rising edge of PCLK as shown in Figure 3-1.
The input data format is defined by the setting of the external SD/HD
,
SMPTE_BYPASS
and DVB_ASI pins and may be presented in 10-bit or 20-bit
format. The input data bus width is controlled independently from the internal data
bus width by the 20bit/10bit
input pin.

GS1532-CFE3

Mfr. #:
Manufacturer:
Semtech
Description:
Serializers & Deserializers - Serdes LQFP-80pin
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet