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NCP1855FCCT1G

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26
© Semiconductor Components Industries, LLC, 2016
January, 2016 − Rev. 0
1 Publication Order Number:
NCP1855/D
NCP1855
9 V / 2.5 A, 12 V / 2 A, Fully
Integrated Li-Ion Switching
Battery Charger with Power
Path Management and USB
On-The-Go Support
The NCP1855 is a fully programmable single cell Lithium-ion
switching battery charger optimized for charging from a USB
compliant input supply and AC adaptor power source. The device
integrates a synchronous PWM controller, power MOSFETs, and the
entire charge cycle monitoring including safety features under
software supervisibon. An optional battery FET can be placed
between the system and the battery in order to isolate and supply the
system. The NCP1855 junction temperature is monitored during
charge cycle and both current and voltage can be modified accordingly
through I
2
C setting. The charger activity and status are reported
through a dedicated pin to the system. The input pin is protected
against overvoltages.
The NCP1855 also provides USB OTG support by boosting the
battery voltage as well as providing overvoltage protected power
supply for USB transceiver.
Features
• 2.5 A Buck Converter with Integrated Pass Devices
• Input Current Limiting to Comply to USB Standard
• Automatic Charge Current for AC Adaptor Charging
• High Accuracy Voltage and Current Regulation
• Input Overvoltage Protection up to +28 V
• Factory Mode
• 1000 mA Boosted Supply for USB OTG Peripherals
• Reverse Leakage Protection Prevents Battery Discharge
• Protected USB Transceiver Supply Switch
• Dynamic Power Path with Optional Battery FET
• Silicon Temperature Supervision for Optimized Charge Cycle
• Safety Timers
• Flag Output for Charge Status and Interrupts
• I
2
C Control Bus up to 3.4 MHz
• Small Footprint 2.2 x 2.55 mm CSP Package
• These Devices are Pb−Free and are RoHS Compliant
Typical Applications
• Smart Phone
• Handheld Devices
• Tablets
• PDAs
MARKING
DIAGRAM
www.
onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 25 of this data sheet.
ORDERING INFORMATION
25 BUMP
FLIP−CHIP
CASE 499BN
1855 = Specific Device Code
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
1855
AYWW
G
NCP1855
www.onsemi.com
2
Figure 1. Typical Application Circuit
IN
FLAG
SCL
SDA
SPM
TRANS
CAP
BAT
FET
WEAK
SENSN
SENSP
CBOOT
SW
USB PHY
ILIM1
AGND
PGND
OTG
+
NCP1855
CORE
SYSTEM
VBUS
D+
D−
ID
GND
10 nF
ILIM2
FTRY
Q
BAT
(*)
C
OUT
22 mF
C
BOOT
33 mW
L
X
2.2 mH
R
SNS
4.7 mF
2.2 mF
C
CORE
C
CAP
1 mF
C
IN
0.1 mF
C
TRS
* Optional Battery FET.
PIN CONNECTIONS
Figure 2. Package Outline CSP
(Top View)
CBOOTE TRANS CORE WEAK BAT
PGND PGND SENSP SENSN FETD
SW SW AGND ILIM1 FTRYC
CAP CAP OTG ILIM2 FLAGB
IN IN SPM SDA SCLA
12345
NCP1855
www.onsemi.com
3
Table 1. PIN FUNCTION DESCRIPTION
Pin Name Type Description
A1 IN POWER Battery Charger Input. These two pins must be decoupled by at least 1 mF capacitor and
connected together.
A2 IN POWER
A3 SPM DIGITAL INPUT System Power Monitor input.
A4 SDA DIGITAL
BIDIRECTIONAL
I
2
C data line
A5 SCL DIGITAL INPUT I
2
C clock line
B1 CAP POWER
CAP pin is the intermediate power supply input for all internal circuitry. Bypass with at
least 4.7 mF capacitor. Must be tied together.
B2 CAP POWER
B3 OTG DIGITAL INPUT Enables OTG boost mode.
OTG = 0, the boost is powered OFF
OTG = 1 turns boost converter ON
B4 ILIM2 DIGITAL INPUT Automatic charge current / Input current limiter level selection (can be defeated by I
2
C).
B5 FLAG OPEN DRAIN
OUTPUT
Charging state active low. This is an open drain pin that can either drive a status LED or
connect to interrupt pin of the system.
C1 SW ANALOG OUTPUT
Connection from power MOSFET to the Inductor.
These pins must be connected together.
C2 SW ANALOG OUTPUT
C3 AGND ANALOG GROUND Analog ground / reference. This pin should be connected to the ground plane and must
be connected together.
C4 ILIM1 DIGITAL INPUT Input current limiter level selection (can be defeated by I
2
C).
C5 FTRY DIGITAL INPUT Factory mode pin. Refer to section “Factory mode and no battery operation”. Internally
pulled up to CORE pin.
D1 PGND POWER GND
Power ground. These pins should be connected to the ground plane and must be
connected together.
D2 PGND POWER GND
D3 SENSP ANALOG INPUT Current sense input. This pin is the positive current sense input. It should be connected to
the R
SENSE
resistor positive terminal.
D4 SENSN ANALOG INPUT Current sense input. This pin is the negative current sense input. It should be connected
to the R
SENSE
resistor negative terminal. This pin is also voltage sense input of the volt-
age regulation loop when the FET is present and open.
D5 FET ANALOG OUTPUT Battery FET driver output. When not used, this pin must be directly tied to ground.
E1 CBOOT ANALOG IN/OUT Floating Bootstrap connection. A 10 nF capacitor must be connected between CBOOT
and SW.
E2 TRANS ANALOG OUTPUT Output supply to USB transceiver. This pin can source a maximum of 50 mA to the
external USB PHY or any other IC that needs +5 V USB. This pin is Overvoltage
protected and will never be higher than 5.5 V. This pin should be bypassed by a 100 nF
ceramic capacitor.
E3 CORE ANALOG OUTPUT
5 V reference voltage of the IC. This pin should be bypassed by a 2.2 mF capacitor.
No load must be connected to this pin.
E4 WEAK ANALOG OUTPUT Weak battery charging current source input.
E5 BAT ANALOG INPUT Battery connection
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26

NCP1855FCCT1G

Mfr. #:
Buy NCP1855FCCT1G
Manufacturer:
ON Semiconductor
Description:
Battery Management 2.5A SWITCHING BATTERY CH
Lifecycle:
New from this manufacturer.
Delivery:
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