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PCA85134H/Q900/1,1

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P53
PCA85134 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2 — 6 May 2014 22 of 53
NXP Semiconductors
PCA85134
Automotive 60 x 4 LCD segment driver for low multiplex rates
An additional feature is for an arbitrary selection of LCD segments to blink. This applies to
the static and 1:2 multiplex drive modes and can be implemented without any
communication overheads. With the output bank selector, the displayed RAM banks are
exchanged with alternate RAM banks at the blink frequency. This mode can also be
specified by the blink-select command.
In the 1:3 and 1:4 multiplex modes, where no alternate RAM bank is available, groups of
LCD elements can blink by selectively changing the display RAM data at fixed time
intervals.
The entire display can blink at a frequency other than the nominal blink frequency. This
can be effectively performed by resetting and setting the display enable bit E at the
required rate using the mode-set command (see Table 12
).
7.12 Command decoder
The command decoder identifies command bytes that arrive on the I
2
C-bus. The
commands available to the PCA85134 are defined in Table 11
.
Table 10. Blink frequencies
Blink mode Operating mode ratio Blink frequency with respect to f
clk
(typical) Unit
f
clk
= 1970 Hz
off - blinking off Hz
12.5 Hz
21.3 Hz
30.6 Hz
f
blink
f
clk
768
---------
=
f
blink
f
clk
1536
------------
=
f
blink
f
clk
3072
------------
=
Table 11. Definition of commands
Command Operation code Reference
Bit 7 6 5 4 3 2 1 0
mode-set 1 1 0 0 E B M[1:0] Table 12
load-data-pointer 0 P[6:0] Table 13
device-select 1 1 1 0 0 A[2:0] Table 14
bank-select 1 1 1 1 1 0 I O Ta bl e 15
blink-select 1 1 1 1 0 AB BF[1:0] Ta ble 16
PCA85134 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2 — 6 May 2014 23 of 53
NXP Semiconductors
PCA85134
Automotive 60 x 4 LCD segment driver for low multiplex rates
[1] The possibility to disable the display allows implementation of blinking under external control.
[2] Default value.
[3] The display is disabled by setting all backplane and segment outputs to V
LCD
.
[4] Not applicable for static drive mode.
[1] Default value.
[1] Default value.
Table 12. Mode-set command bit description
Bit Symbol Value Description
7 to 4 - 1100 fixed value
3E display status
[1]
0
[2]
disabled (blank)
[3]
1 enable
2B LCD bias configuration
[4]
0
[2] 1
⁄
3
bias
1
1
⁄
2
bias
1 to 0 M[1:0] LCD drive mode selection
01 static; one backplane
10 1:2 multiplex; two backplanes
11 1:3 multiplex; three backplanes
00
[2]
1:4 multiplex; four backplanes
Table 13. Load-data-pointer command bit description
See Section 7.10.1 on page 19
.
Bit Symbol Value Description
7 - 0 fixed value
6 to 0 P[6:0] 0000000
[1]
to
0111011
7-bit binary value, 0 to 59; transferred to the
data pointer to define one of 60 display RAM
addresses
Table 14. Device-select command bit description
See Section 7.10.2 on page 19
.
Bit Symbol Value Description
7 to 3 - 11100 fixed value
2 to 0 A[2:0] 000
[1]
to 111 3-bit binary value, 0 to 7; transferred to the
subaddress counter to define one of eight
hardware subaddresses
PCA85134 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 2 — 6 May 2014 24 of 53
NXP Semiconductors
PCA85134
Automotive 60 x 4 LCD segment driver for low multiplex rates
[1] The bank-select command has no effect in 1:3 or 1:4 multiplex drive modes.
[2] Default value.
[1] Default value.
[2] Normal blinking is assumed when the LCD multiplex drive modes 1:3 or 1:4 are selected.
[3] Alternate RAM bank blinking does not apply in 1:3 and 1:4 multiplex drive modes.
[4] For the blink frequencies, see Table 10
.
7.13 Display controller
The display controller executes the commands identified by the command decoder. It
contains the status registers of the PCA85134 and coordinates their effects. The display
controller is also responsible for loading display data into the display RAM in the correct
filling order.
Table 15. Bank-select command bit description
See Section 7.10.4 on page 21.
Bit Symbol Value Description
Static 1:2 multiplex
[1]
7 to 2 - 111110 fixed value
1I input bank selection: storage of arriving
display data
0
[2]
RAM row 0 RAM rows 0 and 1
1 RAM row 2 RAM rows 2 and 3
0O output bank selection: retrieval of LCD display
data
0
[2]
RAM row 0 RAM rows 0 and 1
1 RAM row 2 RAM rows 2 and 3
Table 16. Blink-select command bit description
See Section 7.11 on page 21
.
Bit Symbol Value Description
7 to 3 - 11110 fixed value
2AB blink mode selection
0
[1]
normal blinking
[2]
1 alternate RAM bank blinking
[3]
1 to 0 BF[1:0] blink frequency selection
[4]
00
[1]
off
01 1
10 2
11 3
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PCA85134H/Q900/1,1

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Buy PCA85134H/Q900/1,1
Manufacturer:
NXP Semiconductors
Description:
LCD Drivers 60 X 4 LCD DRIVER FOR MULTIPLEX RATES
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New from this manufacturer.
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