AD73322
–27–REV. B
Table XXII. Device Count Settings
DC2 DC1 DC0 Cascade Length
000 1
001 2
010 3
011 4
100 5
101 6
110 7
111 8
PERFORMANCE
As the AD73322 is designed to provide high performance, low
cost conversion, it is important to understand the means by
which this high performance can be achieved in a typical appli-
cation. This section will, by means of spectral graphs, outline
the typical performance of the device and highlight some of the
options available to users in achieving their desired sample rate,
either directly in the device or by doing some post-processing in
the DSP, while also showing the advantages and disadvantages
of the different approaches.
Encoder Section
The AD73322 offers a variable sampling rate from a fixed
MCLK frequency—with 64 kHz, 32 kHz, 16 kHz and 8 kHz
being available with a 16.384 MHz external clock. Each of these
sampling rates preserves the same sampling rate in the ADC’s
sigma-delta modulator, which ensures that the noise perfor-
mance is optimized in each case. The examples below will show
the performance of a 1 kHz sine wave when converted at the
various sample rates.
The range of sampling rates is aimed to offer the user a degree
of flexibility in deciding how their analog front end is to be
implemented. The high sample rates of 64 kHz and 32 kHz are
suited to those applications, such as active control, where low
conversion group delay is essential. On the other hand, the
lower sample rates of 16 kHz and 8 kHz are better suited for
applications such as telephony, where the lower sample rates
result in lower DSP overhead.
Figure 20 shows the spectrum of the 1 kHz test tone sampled at
64 kHz. The plot shows the characteristic shaped noise floor of
a sigma-delta converter, which is initially flat in the band of
interest but then rises with increasing frequency. If a suitable
digital filter is applied to this spectrum, it is possible to eliminate
the noise floor in the higher frequencies. This signal can then be
used in DSP algorithms or can be further processed in a deci-
mation algorithm to reduce the effective sample rate. Figure 21
shows the resulting spectrum following the filtering and decima-
tion of the spectrum of Figure 20 from 64 kHz to an 8 kHz rate.
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Figure 20. FFT (ADC 64 kHz Sampling)
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Figure 21. FFT (ADC 8 kHz Filtered and Decimated from
64 kHz)
The AD73322 also features direct sampling at the lower rate of
8 kHz. This is achieved by the use of extended decimation regis-
ters within the decimator block, which allows for the increased
word growth associated with the higher effective oversampling
ratio. Figure 22 details the spectrum of a 1 kHz test tone con-
verted at an 8 kHz rate.
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100
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150
Figure 22. FFT (ADC 8 kHz Direct Sampling)
AD73322
–28–
REV. B
The device features an on-chip master clock divider circuit that
allows the sample rate to be reduced as the sampling rate of the
sigma-delta converter is proportional to the output of the MCLK
Divider (whose default state is divide by 1).
The decimator’s frequency response (Sinc3) gives some pass-
band attenuation (up to F
S
/2) which continues to roll off above
the Nyquist frequency. If it is required to implement a digital
filter to create a sharper cutoff characteristic, it may be prudent
to use an initial sample rate of greater than twice the Nyquist
rate in order to avoid aliasing due to the smooth roll-off of the
Sinc3 filter response.
In the case of voiceband processing where 4 kHz represents the
Nyquist frequency, if the signal to be measured were externally
bandlimited then an 8 kHz sampling rate would suffice. How-
ever if it is required to limit the bandwidth using a digital filter,
then it may be more appropriate to use an initial sampling rate
of 16 kHz and to process this sample stream with a filtering and
decimating algorithm to achieve a 4 kHz bandlimited signal at
an 8 kHz rate. Figure 23 details the initial 16 kHz sampled tone.
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Figure 23. FFT (ADC 16 kHz Direct Sampling)
Figure 24 details the spectrum of the final 8 kHz sampled fil-
tered tone.
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Figure 24. FFT (ADC 8 kHz Filtered and Decimated from
16 kHz)
Encoder Group Delay
When programmed for high sampling rates, the AD73322 offers
a very low level of group delay, which is given by the following
relationship:
Group Delay (Decimator) = Order × ((M – 1)/2) × T
DEC
where:
Order is the order of the decimator (= 3),
M is the decimation factor (= 32 @ 64 kHz, = 64 @ 32 kHz,
= 128 @ 16 kHz , = 256 @ 8 kHz) and
T
DEC
is the decimation sample interval (= 1/2.048e6) (based
on DMCLK = 16.384 MHz) => Group Delay (Decimator @
64 kHz) = 3 × (32 – 1)/2 × (1/2.048e6) = 22.7 µs
If final filtering is implemented in the DSP, the final filter’s
group delay must be taken into account when calculating overall
group delay.
Decoder Section
The decoder section updates (samples) at the same rate as the
encoder section. This rate is programmable as 64 kHz, 32 kHz,
16 kHz or 8 kHz (from a 16.384 MHz MCLK). The decoder
section represents a reverse of the process that was described in
the encoder section. In the case of the decoder section, signals
are applied in the form of samples at an initial low rate. This
sample rate is then increased to the final digital sigma-delta
modulator rate of DMCLK/8 by interpolating new samples
between the original samples. The interpolating filter also has the
action of canceling images due to the interpolation process using
spectral nulls that exist at integer multiples of the initial sam-
pling rate. Figure 25 shows the spectral response of the decoder
section sampling at 64 kHz. Again, its sigma-delta modulator
shapes the noise so it is reduced in the voice bandwidth dc–
4 kHz. For improved voiceband SNR, the user can implement
an initial anti-imaging filter, preceded by 8 kHz to 64 kHz inter-
polation, in the DSP.
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Figure 25. FFT (DAC 64 kHz Sampling)
AD73322
–29–REV. B
As the AD73322 can be operated at 8 kHz (see Figure 26) or
16 kHz sampling rates, which make it particularly suited for
voiceband processing, it is important to understand the action of
the interpolator’s Sinc3 response. As was the case with the en-
coder section, if the output signal’s frequency response is not
bounded by the Nyquist frequency it may be necessary to perform
some initial digital filtering to eliminate signal energy above
Nyquist to ensure that it is not imaged at the integer multiples
of the sampling frequency. If the user chooses to bypass the
interpolator, perhaps to reduce group delay, images of the origi-
nal signal will be generated at integer intervals of the sampling
frequency. In this case these images must be removed by exter-
nal analog filtering.
FREQUENCY – Hz
0 500
0
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dB
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1000 1500 2000 2500 3000 3500 4000
–70
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Figure 26. FFT (DAC 8 kHz Sampling)
Figure 27 shows the output spectrum of a 1 kHz tone being
generated at an 8 kHz sampling rate with the interpolator
bypassed.
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Figure 27. FFT (DAC 8 kHz Sampling—Interpolator
Bypassed)
Decoder Group Delay
The interpolator roll-off is mainly due to its sinc-cubed function
characteristic, which has an inherent group delay given by the
equation:
Group Delay (Interpolator) = Order × (L – 1)/2) × T
INT
where:
Order is the interpolator order (= 3),
L is the interpolation factor (= 32 @ 64 kHz, = 64 @ 32 kHz,
= 128 @ 16 kHz, = 256 @ 8 kHz) and
T
INT
is the interpolation sample interval (= 1/2.048e6)
=> Group Delay (Interpolator @ 64 kHz)
= 3 × (32 – 1)/2 × (1/2.048e6)
= 22.7 µs
The analog section has a group delay of approximately 25 µs.
On-Chip Filtering
The primary function of the system filtering’s sinc-cubed (Sinc3)
response is to eliminate aliases or images of the ADCs or DAC’s
resampling, respectively. Both modulators are sampled at a
nominal rate of DMCLK/8 (which is 2.048 MHz for a DMCLK
of 16.384 MHz) and the simple, external RC antialias filter is
sufficient to provide the required stopband rejection above the
Nyquist frequency for this sample rate. In the case of the ADC
section, the decimating filter is required to both decrease sample
rate and increase sample resolution. The process of changing
sample rate (resampling) leads to aliases of the original sampled
waveform appearing at integer multiples of the new sample rate.
These aliases would get mapped into the required signal pass-
band without the application of some further antialias filtering.
In the AD73322, the sinc-cubed response of the decimating
filter creates spectral nulls at integer multiples of the new sample
rate. These nulls coincide with the aliases of the original wave-
form which were created by the down-sampling process, there-
fore reducing or eliminating the aliasing due to sample rate
reduction.
In the DAC section, increasing the sampling rate by interpola-
tion creates images of the original waveform at intervals of the
original sampling frequency. These images may be sufficiently
rejected by external circuitry but the sinc-cubed filter in the
interpolator again nulls the output spectrum at integer intervals
of the original sampling rate which corresponds with the images
due to the interpolation process.
The spectral response of a sinc-cubed filter shows the character-
istic nulls at integer intervals of the sampling frequency. Its
passband characteristic (up to Nyquist frequency) features a
roll-off that continues up to the sampling frequency, where the
first null occurs. In many applications this smooth response will
not give sufficient attenuation of frequencies outside the band of
interest therefore it may be necessary to implement a final filter
in the DSP which will equalize the passband rolloff and provide
a sharper transition band and greater stopband attenuation.

AD73322LARUZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog Front End - AFE Dual-Ch 3V Front-End Processor
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