P89LPC9102_9103_9107_3 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 03 — 10 July 2007 52 of 61
NXP Semiconductors
P89LPC9102/9103/9107
8-bit microcontrollers with two-clock accelerated 80C51 core
12.1 Waveforms
Fig 19. Shift register mode timing (P89LPC9103/9107)
01234567
valid valid valid valid valid valid valid valid
T
XLXL
002aaa906
set TI
set RI
t
XHQX
t
QVXH
t
XHDV
t
XHDX
clock
output data
write to SBUF
input data
clear RI
Fig 20. External clock timing
t
CHCL
t
CLCX
t
CHCX
T
cy(clk)
t
CLCH
002aaa907
0.2V
DD
+ 0.9 V
0.2V
DD
0.1 V
V
DD
0.5 V
0.45 V
P89LPC9102_9103_9107_3 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 03 — 10 July 2007 53 of 61
NXP Semiconductors
P89LPC9102/9103/9107
8-bit microcontrollers with two-clock accelerated 80C51 core
13. Other characteristics
13.1 Comparator electrical characteristics
[1] This parameter is characterized, but not tested in production.
13.2 A/D converter electrical characteristics
Table 15. Comparator electrical characteristics
V
DD
= 2.4 V to 3.6 V, unless otherwise specified.
T
amb
=
40
°
C to +85
°
C for industrial applications, unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
V
IO
input offset voltage - - ±10 mV
V
IC
common-mode input voltage 0 - V
DD
0.3 V
CMRR common-mode rejection ratio
[1]
--50 dB
t
res(tot)
total response time - 250 500 ns
t
(CE-OV)
chip enable to output valid time - - 10 µs
I
LI
input leakage current 0 V < V
I
<V
DD
--±1 µA
Table 16. A/D converter electrical characteristics
V
DD
= 2.4 V to 3.6 V, unless otherwise specified.
T
amb
=
40
°
C to +85
°
C for industrial applications, unless otherwise specified.
All limits valid for an external source impedance of less than 10 k
.
Symbol Parameter Conditions Min Typ Max Unit
V
IA
analog input voltage V
SS
0.2 - V
SS
+ 0.2 V
C
iss
input capacitance - - 15 pF
E
D
differential linearity error - - ±1 LSB
E
L(adj)
integral non-linearity - - ±1 LSB
E
O
offset error - - ±2 LSB
E
G
gain error - - ±1%
E
u(tot)
total unadjusted error - - ±2 LSB
M
CTC
channel-to-channel matching - - ±1 LSB
α
ct(port)
crosstalk between port inputs 0 kHz to 100 kHz - - 60 dB
SR
in
input slew rate - - 100 V/ms
T
cy(ADC)
ADC clock cycle 111 - 2000 ns
t
ADC
ADC conversion time A/D enabled - - 13t
CLK(ADC)
µs
P89LPC9102_9103_9107_3 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 03 — 10 July 2007 54 of 61
NXP Semiconductors
P89LPC9102/9103/9107
8-bit microcontrollers with two-clock accelerated 80C51 core
14. Package outline
Fig 21. Package outline SOT650-1 (HVSON10)
0.50.21
0.05
0.00
A
1
E
h
b
UNIT
D
(1)
ye
2
e
1
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
3.1
2.9
cD
h
1.75
1.45
y
1
3.1
2.9
2.55
2.15
0.30
0.18
0.05 0.1
DIMENSIONS (mm are the original dimensions)
SOT650-1 MO-229 - - -- - -
E
(1)
0.55
0.30
L
0.1
v
0.05
w
0 2 mm1
scale
SOT650-1
HVSON10: plastic thermal enhanced very thin small outline package; no leads;
10 terminals; body 3 x 3 x 0.85 mm
A
(1)
max.
A
A
1
c
detail X
y
D
h
E
h
e
L
10
51
6
D
E
y
1
C
C
B
A
01-01-22
02-02-08
terminal 1
index area
terminal 1
index area
X
e
1
b
AC
C
B
v
M
w
M
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.

P89LPC9103FTK,115

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC MCU 8BIT 1KB FLASH 10HVSON
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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