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P89LPC9103FTK,115

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P61
P89LPC9102_9103_9107_3 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 03 — 10 July 2007 58 of 61
NXP Semiconductors
P89LPC9102/9103/9107
8-bit microcontrollers with two-clock accelerated 80C51 core
16. Revision history
Table 18. Revision history
Document ID Release date Data sheet status Change notice Supersedes
P89LPC9102_9103_ 9107_3 20070710 Product data sheet - P89LPC9102_9103_9107_2
Modifications:
• The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
• Added new device P89LPC9107FN.
P89LPC9102_9103_ 9107_2 20050411 Product data sheet - P89LPC9102_9103_9107_1
P89LPC9102_9103_ 9107_1 20050111 Product data sheet - -
P89LPC9102_9103_9107_3 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 03 — 10 July 2007 59 of 61
NXP Semiconductors
P89LPC9102/9103/9107
8-bit microcontrollers with two-clock accelerated 80C51 core
17. Legal information
17.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL
http://www.nxp.com.
17.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
17.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected to
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at
http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
17.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
18. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: salesaddresses@nxp.com
Document status
[1][2]
Product status
[3]
Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
P89LPC9102_9103_9107_3 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 03 — 10 July 2007 60 of 61
continued >>
NXP Semiconductors
P89LPC9102/9103/9107
8-bit microcontrollers with two-clock accelerated 80C51 core
19. Contents
1 General description . . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2.1 Principal features . . . . . . . . . . . . . . . . . . . . . . . 1
2.2 Additional features . . . . . . . . . . . . . . . . . . . . . . 1
3 Product comparison overview . . . . . . . . . . . . . 2
4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3
4.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3
5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 6
7 Pinning information. . . . . . . . . . . . . . . . . . . . . . 8
7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . 10
8 Functional description . . . . . . . . . . . . . . . . . . 15
8.1 Special function registers . . . . . . . . . . . . . . . . 15
8.2 Enhanced CPU. . . . . . . . . . . . . . . . . . . . . . . . 27
8.3 Clocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
8.3.1 Clock definitions . . . . . . . . . . . . . . . . . . . . . . . 27
8.3.2 CPU clock (CCLK) . . . . . . . . . . . . . . . . . . . . . 27
8.4 On-chip RC oscillator option. . . . . . . . . . . . . . 27
8.5 Watchdog oscillator option . . . . . . . . . . . . . . . 28
8.6 External clock input option . . . . . . . . . . . . . . . 28
8.7 CCLK wake-up delay . . . . . . . . . . . . . . . . . . . 29
8.8 CCLK modification: DIVM register . . . . . . . . . 29
8.9 Low power select . . . . . . . . . . . . . . . . . . . . . . 29
8.10 Memory organization . . . . . . . . . . . . . . . . . . . 29
8.11 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8.11.1 External interrupt inputs . . . . . . . . . . . . . . . . . 30
8.12 I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
8.12.1 Port configurations . . . . . . . . . . . . . . . . . . . . . 31
8.12.2 Quasi-bidirectional output configuration . . . . . 32
8.12.3 Open-drain output configuration . . . . . . . . . . . 32
8.12.4 Input-only configuration . . . . . . . . . . . . . . . . . 32
8.12.5 Push-pull output configuration . . . . . . . . . . . . 32
8.12.6 Port 0 analog functions. . . . . . . . . . . . . . . . . . 32
8.12.7 Additional port features. . . . . . . . . . . . . . . . . . 32
8.13 Power monitoring functions. . . . . . . . . . . . . . . 33
8.13.1 Brownout detection. . . . . . . . . . . . . . . . . . . . . 33
8.13.2 Power-on detection. . . . . . . . . . . . . . . . . . . . . 33
8.14 Power reduction modes . . . . . . . . . . . . . . . . . 33
8.14.1 Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
8.14.2 Slow-down mode using the DIVM register . . . 34
8.14.3 Power-down mode . . . . . . . . . . . . . . . . . . . . . 34
8.14.4 Total Power-down mode . . . . . . . . . . . . . . . . . 34
8.15 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
8.16 Timers 0 and 1 . . . . . . . . . . . . . . . . . . . . . . . . 35
8.16.1 Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8.16.2 Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8.16.3 Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8.16.4 Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8.16.5 Mode 6 (P89LPC9102/9107) . . . . . . . . . . . . . 35
8.16.6 Timer overflow toggle output
(P89LPC9102/9107) . . . . . . . . . . . . . . . . . . . 36
8.17 RTC/system timer. . . . . . . . . . . . . . . . . . . . . . 36
8.18 UART (P89LPC9103/9107) . . . . . . . . . . . . . . 36
8.18.1 Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
8.18.2 Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
8.18.3 Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
8.18.4 Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
8.18.5 Baud rate generator and selection . . . . . . . . . 37
8.18.6 Framing error . . . . . . . . . . . . . . . . . . . . . . . . . 37
8.18.7 Break detect. . . . . . . . . . . . . . . . . . . . . . . . . . 37
8.18.8 Double buffering. . . . . . . . . . . . . . . . . . . . . . . 37
8.18.9 Transmit interrupts with double buffering
enabled (Modes 1, 2 and 3) . . . . . . . . . . . . . . 38
8.18.10 The 9
th
bit (bit 8) in double buffering
(Modes 1, 2 and 3). . . . . . . . . . . . . . . . . . . . . 38
8.19 Analog comparators. . . . . . . . . . . . . . . . . . . . 38
8.20 Internal reference voltage. . . . . . . . . . . . . . . . 38
8.21 Comparator interrupt . . . . . . . . . . . . . . . . . . . 39
8.22 Comparator and power reduction modes. . . . 39
8.23 Keypad interrupt (KBI) . . . . . . . . . . . . . . . . . . 39
8.24 Watchdog timer . . . . . . . . . . . . . . . . . . . . . . . 39
8.25 Additional features . . . . . . . . . . . . . . . . . . . . . 40
8.25.1 Software reset . . . . . . . . . . . . . . . . . . . . . . . . 40
8.25.2 Dual data pointers . . . . . . . . . . . . . . . . . . . . . 40
8.26 Flash program memory . . . . . . . . . . . . . . . . . 41
8.26.1 General description . . . . . . . . . . . . . . . . . . . . 41
8.26.2 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
8.26.3 Flash organization . . . . . . . . . . . . . . . . . . . . . 41
8.26.4 Flash programming and erasing. . . . . . . . . . . 41
8.26.5 In-circuit programming . . . . . . . . . . . . . . . . . . 42
8.26.6 In-application programming (IAP-Lite) . . . . . . 42
8.26.7 Using flash as data storage . . . . . . . . . . . . . . 42
8.26.8 User configuration bytes. . . . . . . . . . . . . . . . . 42
8.26.9 User sector security bytes . . . . . . . . . . . . . . . 42
9 A/D Converter . . . . . . . . . . . . . . . . . . . . . . . . . 43
9.1 General description . . . . . . . . . . . . . . . . . . . . 43
9.2 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
9.3 Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . 44
9.4 A/D operating modes . . . . . . . . . . . . . . . . . . . 44
9.4.1 Fixed channel, single conversion mode . . . . . 44
9.4.2 Fixed channel, continuous conversion mode . 44
9.4.3 Auto scan, single conversion mode . . . . . . . . 44
9.4.4 Auto scan, continuous conversion mode . . . . 44
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P61

P89LPC9103FTK,115

Mfr. #:
Buy P89LPC9103FTK,115
Manufacturer:
NXP Semiconductors
Description:
IC MCU 8BIT 1KB FLASH 10HVSON
Lifecycle:
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