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P3041NXE7MMC

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P31
P3041 QorIQ Communications Processor Product Brief, Rev. 0
Developer Environment
Freescale Semiconductor28
— Generates trace messages to Nexus port controller (NPC)
— Supports filtering of accesses of interest
– Data Address Compare (4)
– Data Value Compare (2)
– Transaction Attribute Compare (2)
4 Developer Environment
Software developers creating solutions with the Power Architecture technology have long benefited from
a vibrant support ecosystem, including high quality tools, OSes, and network protocol stacks. Freescale is
working with our ecosystem partners to ensure that this remains the case for multicore, Power
Architecture-based products, including the P3041.
The various levels of the developer environment are shown in Figure 10, with the more broadly used tools
and boards at the base of the pyramid, and increasingly application-specific enablement items at the top.
Each level is described further in the following subsections:
• Section 4.1, “Base of the Pyramid: Broadly-Used Tools and Boards”
• Section 4.2, “First Level of the Pyramid: Debug and Performance Analysis”
• Section 4.3, “Second Level of the Pyramid: Simulation, Hypervisor, and DPAA Reference
“Stacklets”
• Section 4.4, “Top Level of the Pyramid: Application-Specific Enablement”
Figure 10. Levels of Developer Environment
Hybrid Simulator
Hypervisor Micro-Kernel
DPAA Reference ‘Stacklets’
Advanced Debug Profiling
Hardware Platforms
SMP/AMP Capable OS’s
3rd Party Stacks
and Performance Analysis
Compilers, Debuggers, Bootloaders, LSPs, Drivers
Application-specific enablement items
Broadly-used tools and boards
Developer Environment
P3041 QorIQ Communications Processor Product Brief, Rev. 0
Freescale Semiconductor 29
4.1 Base of the Pyramid: Broadly-Used Tools and Boards
4.1.1 Hardware Platforms
This category includes both development systems and the reference designs. Development systems are
available from both Freescale and our partners, with some partner systems being offered with form factors
and BOMs to support use as reference designs. Freescale development systems are supported by the open
source GNU tool set including compilers, linkers, and debuggers.
4.1.2 Compilers, Debuggers, Bootloaders, LSPs, Drivers
In active partnership with the open source community and Linux distribution and support suppliers, these
tools will be updated to fully and efficiently support the P3041.
4.1.3 SMP/AMP Capable OS’s
Open source tools will be part of an overall P3041 development board Linux support package, which will
include AMP and SMP versions of the Linux OS, and device drivers for the accelerators and networking
and peripheral interfaces featured in the P3041. AMP Linux support will include the ability to boot
multiple instances of Linux on different cores. Power Architecture ecosystem partners are committed to
providing board support packages for the P3041.
4.2 First Level of the Pyramid: Debug and Performance Analysis
4.2.1 Advanced Debug
Advanced debug supports real-time trace analysis. It allows the developer to perform initial system
bring-up and development, and is required to deal with the special challenges of software debugging and
performance analysis in multicore systems.
4.2.2 Profiling and Performance Analysis
Freescale will bring tools support for profiling and performance analysis (such as enhanced statistics
gathering) to the market both by means of our CodeWarrior line of tools and in partnership with industry
standard tools suppliers.
4.3 Second Level of the Pyramid:
Simulation, Hypervisor, and DPAA Reference “Stacklets”
4.3.1 Hybrid Simulator
In conjunction with Virtutech, Freescale will provide a hybrid simulator that combines both functional and
performance measurement models of the P3041. The hybrid simulator allows the user to switch between
“fast functional mode” and “detailed performance mode” with capabilities that include the following:
P3041 QorIQ Communications Processor Product Brief, Rev. 0
Document Revision History
Freescale Semiconductor30
• Global visibility
• Determinism
• Bug reproducibility
• Reverse execution
• Special abilities to detect race conditions
• Ability to detect race conditions
4.3.2 Hypervisor Micro-Kernel
The P3041’s e500mc cores offer a new embedded Hypervisor capability to address the need for a single
operating system performing coordination and access control functions, managing shared resources in an
efficient manner. The embedded Hypervisor provides the software layer needed to manage the operating
systems and supervisor-level applications as they access shared resources. Recognizing that each
developer’s system design may call for a different partitioning of resources, and involve different
combinations of OSes and RTOSes, Freescale and our ecosystem partners will provide reference
implementations of the embedded Hypervisor’s peripheral virtualization and access control which the
developer can modify to match unique system requirements.
4.3.3 DPAA Reference “Stacklets”
It is expected that some CPUs will be dedicated as datapath processors, working closely with the DPAA.
Freescale will provide reference protocol “stacklets,” optimizing performance critical regions of protocol
processing and their interaction with the DPAA hardware.
4.4 Top Level of the Pyramid: Application-Specific Enablement
This category includes 3rd-party stacks optimized for DPAA, RegEx, AV TCP, IPv4/6, IPsec/SSL.
Many of the expected applications for the P3041 involve network protocol processing. Partitioning
between control CPUs and datapath CPUs, and developing the protocol processing firmware which runs
on the datapath CPUs is an area for significant value added services for Freescale partners at the top level
of the enablement pyramid. OEMs wishing to engage with these partners can realize significant
“time-to-performance” advantages.
5 Document Revision History
Table 7 provides a revision history for this product brief.
Table 7. Revision History
Rev.
Number
Date Substantive Change(s)
0 11/2011 Initial public release
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P31

P3041NXE7MMC

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Microprocessors - MPU P3041 -40-105C WE1200 R2
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