1. General description
The device is an SD 3.0-compliant 6-bit bidirectional dual voltage level translator. It is
designed to interface between a memory card operating at 1.8 V or 2.9 V signal levels and
a host with a fixed nominal supply voltage of 1.2 V to 3.3 V. The device supports SD 3.0
SDR50, DDR50, SDR25, SDR12 and SD 2.0 High-Speed (50 MHz) and Default-Speed
(25 MHz) modes. The device has an integrated switchable voltage regulator to supply the
card-side I/Os, built-in EMI filters and robust ESD protections (IEC 61000-4-2, level 4).
2. Features and benefits
Supports up to 100 MHz clock rate
Feedback channel for clock synchronization
SD 3.0 specification-compliant voltage translation to support SDR50, DDR50, SDR25,
SDR12, High-Speed and Default-Speed modes
Low dropout voltage regulator to supply the card-side I/Os
Low-power consumption by push-pull output stage with break-before-make
architecture
Integrated pull-up and pull-down resistors: no external resistors required
Integrated EMI filters suppress higher harmonics of digital I/Os
Integrated 8 kV ESD protection according to IEC 61000-4-2, level 4 on card side
Level shifting buffers keep ESD stress away from the host (zero-clamping concept)
Pb-free, RoHS compliant and free of halogen and antimony (Dark Green compliant)
25-ball WLCSP; pitch 0.4 mm
3. Applications
SD, MMC, microSD memory card interfaces
Mobile phones, smartphones and tablet PCs
Card readers in computer
Digital cameras
4. Ordering information
IP4855CX25
SD 3.0-compliant memory card integrated voltage level
translator with EMI filter and ESD protection
Rev. 2 — 24 May 2013 Product data sheet
Table 1. Ordering information
Type number Package
Name Description Version
IP4855CX25/P WLCSP25 wafer level chip-size package; 25 bumps (5 5); 2.04 2.04 0.5 mm IP4855CX25
