IP4855CX25 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 24 May 2013 18 of 30
NXP Semiconductors
IP4855CX25
SD 3.0-compliant memory card integrated dual voltage level translator
[1] A capacitive load of C
L
= 20 pF is out of the range of allowed SD-card interface parasitic capacitance.
[2] Reference points 90 % and 10 % are not required according to the SD 3.0 specification.
[1] Reference points 90 % and 10 % are not required according to the SD 3.0 specification.
t
t
transition time C
L
= 20 pF
[1]
nominal case; T
amb
= +25 C; V
LDO
= 1.8 V 2.9 3.1 3.4 ns
best case; T
amb
= 40 C; V
LDO
= 1.95 V 2.9 3.0 3.2 ns
worst case; T
amb
= +85 C; V
LDO
= 1.7 V 2.9 3.2 3.5 ns
Table 13. Output rise and fall times card side …continued
V
SUPPLY
= 4 V; unless otherwise specified; track impedance 35
, track length (to and from IP4855CX25) 15 mm;
R
source
=50
; see Figure 7 for set-up circuit and Figure 8 for timing diagram; V
CCA
= 1.8 V; transition time is the same as
output rise time and output fall time
Symbol Parameter Conditions Min. Typ Max Unit
Table 14. Output rise and fall times host side
V
SUPPLY
= 4.0 V; SEL = LOW; V
O(reg)
= 2.9 V; unless otherwise specified; track impedance 35
, track length (to and from
IP4855CX25) 15 mm; R
source
=50
; see Figure 7 for set-up circuit and Figure 8 timing diagram;
transition time is the same as output rise time and output fall time
Symbol Parameter Conditions Min Typ Max Unit
Host-side output pins: CLK_FB, CMD_H and DATA0_H to DATA3_H (3.3 V host)
Reference points at 20 % and 70 %
t
t
transition time C
L
= 5 pF
nominal case; T
amb
= +25 C; V
CCA
= 3.3 V 0.5 0.6 0.7 ns
best case; T
amb
= 40 C; V
CCA
= 3.6 V 0.5 0.6 0.7 ns
worst case; T
amb
= +85 C; V
CCA
= 2.7 V 0.5 0.6 0.7 ns
Reference points at 10 % and 90 %
[1]
t
t
transition time C
L
=5pF
nominal case; T
amb
= +25 C; V
CCA
= 3.3 V 1.0 1.3 1.5 ns
best case; T
amb
= 40 C; V
CCA
= 3.6 V 1.0 1.2 1.4 ns
worst case; T
amb
= +85 C; V
CCA
= 2.7 V 1.3 1.4 1.6 ns
Host-side output pins: CLK_FB, CMD_H and DATA0_H to DATA3_H (1.8 V host)
Reference points at 20 % and 70 %
t
t
transition time C
L
= 5 pF
nominal case; T
amb
= +25 C; V
CCA
= 1.8 V 0.5 0.6 0.7 ns
best case; T
amb
= 40 C; V
CCA
= 1.9 V 0.5 0.6 0.7 ns
worst case; T
amb
= +85 C; V
CCA
= 1.62 V 0.5 0.6 0.7 ns
Reference points at 10 % and 90 %
[1]
t
t
transition time C
L
=5pF
nominal case; T
amb
= +25 C; V
CCA
= 1.8 V 1.0 1.3 1.5 ns
best case; T
amb
= 40 C; V
CCA
= 1.9 V 1.0 1.2 1.4 ns
worst case; T
amb
= +85 C; V
CCA
= 1.62 V 1.3 1.4 1.6 ns
