IP4855CX25 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 24 May 2013 25 of 30
NXP Semiconductors
IP4855CX25
SD 3.0-compliant memory card integrated dual voltage level translator
16. Design and assembly recommendations
16.1 PCB design guidelines
For optimum performance, use a Non-Solder Mask PCB Design (NSMD), also known as a
copper-defined design, incorporating laser-drilled micro-vias connecting the ground pads
to a buried ground-plane layer. This results in the lowest possible ground inductance and
provides the best high frequency and ESD performance. For this case, refer to Table 17
for the recommended PCB design parameters.
[1] OSP: Organic Solderability Preservation
FR4: Flame Retard 4
16.2 PCB assembly guidelines for Pb-free soldering
Table 17. Recommended PCB design parameters
Parameter Value or Specification
[1]
PCB pad diameter 250 m
Micro-via diameter 100 m (0.004 inch)
Solder mask aperture diameter 325 m
Copper thickness 20 m to 40 m
Copper finish AuNi or OSP
PCB material FR4
Table 18. Assembly recommendations
Parameter Value or Specification
Solder screen aperture diameter 290 m
Solder screen thickness 100 m (0.004 inch)
Solder paste: Pb-free SnAg (3 % to 4 %) Cu (0.5 % to 0.9 %)
Solder/flux ratio 50/50
Solder reflow profile see Figure 15
IP4855CX25 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 24 May 2013 26 of 30
NXP Semiconductors
IP4855CX25
SD 3.0-compliant memory card integrated dual voltage level translator
17. Abbreviations
The device can withstand at least three reflows of this profile.
Fig 15. Pb-free solder reflow profile
Table 19. Reflow soldering process characteristics
Symbol Parameter Conditions Min Typ Max Unit
T
reflow(peak)
peak reflow temperature 230 - 260 C
t
1
time 1 soak time 60 - 180 s
t
2
time 2 time during T 250 C--30s
t
3
time 3 time during T 230 C10- 50s
t
4
time 4 time during T > 217 C 30 - 150 s
t
5
time 5 - - 540 s
dT/dt rate of change of
temperature
cooling rate - - 6 C/s
pre-heat 2.5 - 4.0 C/s
001aai161
T
reflow(peak)
250
230
217
T
(°C)
cooling rate
pre-heat
t
1
t
2
t
5
t
4
t
3
t (s)
Table 20. Abbreviations
Acronym Description
DUT Device Under Test
EMI ElectroMagnetic Interference
ESD ElectroStatic Discharge
FR4 Flame Retard 4
MMC MultiMedia Card
NSMD Non-Solder Mask Design
OSP Organic Solderability Preservation
PCB Printed-Circuit Board
RoHS Restriction of Hazardous Substances
SD Secure Digital
WLCSP Wafer-Level Chip-Scale Package
IP4855CX25 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 24 May 2013 27 of 30
NXP Semiconductors
IP4855CX25
SD 3.0-compliant memory card integrated dual voltage level translator
18. Revision history
Table 21. Revision history
Document ID Release date Data sheet status Change notice Supersedes
IP4855CX25 v.2 20130524 Product data sheet - IP4855CX25 v.1
Modifications:
Section 3 “Applications: updated
Table 10: revised host-side control signals
IP4855CX25 v.1 20120913 Product data sheet - -

IP4855CX25Z

Mfr. #:
Manufacturer:
Nexperia
Description:
Translation - Voltage Levels SD 3.0-Compliant Memory Card
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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