©2011 Silicon Storage Technology, Inc. DS25085A 10/11
26
8 Mbit Firmware Hub
SST49LF008A
Data Sheet
Microchip Technology Company
Table 18:AC Input/Output Specifications, V
DD
=3.0-3.6V (FWH Mode)
Symbol Parameter
Limits
Test ConditionsMin Max Units
I
OH
(AC) Switching Current High -12 V
DD
-17.1(V
DD
-V
OUT
)
Equation C
1
mA
mA
0<V
OUT
0.3V
DD
0.3V
DD
<V
OUT
< 0.9V
DD
0.7V
DD
<V
OUT
<V
DD
(Test Point) -32 V
DD
mA V
OUT
=0.7V
DD
I
OL
(AC) Switching Current Low 16 V
DD
26.7 V
OUT
Equation D
1
mA
mA
V
DD
>V
OUT
0.6V
DD
0.6V
DD
>V
OUT
> 0.1V
DD
0.18V
DD
>V
OUT
>0
(Test Point) 38 V
DD
mA V
OUT
=0.18V
DD
I
CL
Low Clamp Current -25+(V
IN
+1)/0.015 mA -3 < V
IN
-1
I
CH
High Clamp Current 25+(V
IN
-V
DD
-1)/0.015 mA V
DD
+4 > V
IN
V
DD
+1
slewr
2
Output Rise Slew Rate 1 4 V/ns 0.2V
DD
-0.6V
DD
load
slewf
2
Output Fall Slew Rate 1 4 V/ns 0.6V
DD
-0.2V
DD
load
T18.3 25085
1. See PCI spec.
2. PCI specification output load is used.
Table 19:Reset Timing Parameters, V
DD
=3.0-3.6V (FWH Mode)
Symbol Parameter Min Max Units
T
PRST
V
DD
stable to Reset Low 1 ms
T
KRST
Clock Stable to Reset Low 100 µs
T
RSTP
RST# Pulse Width 100 ns
T
RSTF
RST# Low to Output Float 48 ns
T
RST
1
1. There will be a latency of T
RSTE
if a reset procedure is performed during a Program or Erase operation.
RST# High to FWH4 Low 1 µs
T
RSTE
RST# Low to reset during Sector-/Block-Erase or Program 10 µs
T19.5 25085
